below marketmost similar roles pay hereabove market
This role pays less than
91%
of similar roles. Most pay
$157,646–$219,862
— the blue band above.
At the midpoint, this role pays about
$127k
versus about
$189k
for comparable roles.
Based on 240 similar postings.
Employer
About Qualcomm
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has
575 open roles
on FindRole.
Listed pay typically runs
$147,900–$221,900
across 550 roles with salary data.
The PST Validation Engineer joins the ASICS Engineering team to support the development of high performance, low power products. In this role, you will perform silicon bring-up and measure Vmin/Fmax, power, and thermal data while characterizing and analyzing results across various PVTs and SoC IPs. You will debug low-level software and hardware issues using JTAG and kernel debuggers like Lauterbach Trace32. Key responsibilities include managing emulation builds, identifying performance issues, and automating validation flows and data collection. You must possess knowledge of mobile chip architecture, including CPU, GPU, DDR, and NOCs, along with experience in RTL and transistor power fundamentals. Required skills include proficiency in C and Python scripting, regression testing, and architecting test bench infrastructure for CPU and SoC emulation across different platforms.
Perform silicon bring-up and measure Vmin, Fmax, power, and thermal data.
Characterize and analyze system-level data across various PVTs and SoC IPs.
Debug low-level software and hardware issues using JTAG and kernel debuggers.
Manage emulation builds and identify performance issues or test failures.
Automate validation flows and data collection using Python or similar scripting languages.
Architect and develop test bench infrastructure for CPU/SoC emulation across different platforms.
What we're looking for
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field.
Understanding of mobile chip architecture, basic RTL, and transistor power fundamentals.
Knowledge of regression and PVT testing, including data analysis and extraction of key metrics.
Experience debugging low-level software and hardware issues using tools like JTAG and kernel debuggers.
Excellent programming and scripting skills in C and Python, including familiarity with prompt engineering.
Experience in architecting and developing test bench infrastructure for CPU/SoC emulation across different platforms.
GPU
C/C++
Python
JS
SERDES
High speed IO
Deep Learning
AI
Ethernet
InfiniBand
Oscilloscopes
Digital Multi Meter
Waveform Analysis
System Management
Networking
Storage
System Debug
Silicon Validation
X86 Architecture
SoC Design
PCIe
CXL
Device Drivers
System BIOS
RAS
Power Management
Script Development
Post-Silicon Validation