SoC DRAM Memory Subsystem Validation Engineering Program Manager

Apple Inc

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Quick summary

Work type
On-site
Location
Cupertino, CA
Salary
$175,500–$311,700 / yr
Posted
3 days ago
Freshness
Confirmed live today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $209k
This role $244k
$131k most similar roles pay here $331k

This role pays more than 82% of similar roles. Most pay $176,043–$241,750 — the shaded band above. At the midpoint, this role pays about $244k versus about $209k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

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At a glance

TL;DR · SoC DRAM Memory Subsystem Validation Engineering Program Manager

The SoC DRAM Memory Subsystem Validation Engineering Program Manager joins the team responsible for crafting custom silicon and managing high-bandwidth multi-client memory subsystems. This role involves driving memory subsystem readiness, including bring-up, validation, and complex debug of groundbreaking memory technologies across various product lines. The manager serves as a critical interface between architecture, memory controller design, verification, DDR PHY, product engineering, and software teams to ensure quality standards from architecture to mass production. Key responsibilities include leading post-silicon debug activities, coordinating with DRAM vendors on new technology development, and managing the distribution of materials across systems in development. The role requires expertise in SoC memory architecture, sophisticated DDR controllers, high-speed IO interfaces, and calibration mechanisms. Candidates must possess strong leadership skills to navigate a multi-disciplined engineering environment while resolving critical problems under pressure.

What you'll do

  • Drive memory subsystem readiness, bring-up, and validation for custom SoCs.
  • Lead post-silicon debug activities to root-cause problems and determine corrective actions.
  • Coordinate with multi-functional teams to resolve silicon issues across design, verification, and software.
  • Manage the adoption of new DRAM technologies and custom package development processes.
  • Drive technical sessions with DRAM vendors to ensure they meet specification and schedule requirements.
  • Coordinate with supply management teams to plan and track the distribution of new DRAM materials.
  • Collaborate with test and quality engineering teams to finalize SoC performance targets and screening requirements.
  • Execute internal program processes to guarantee high-quality silicon production.

What we're looking for

  • Bachelor's degree and 10 years of relevant experience.
  • Prior experience in SoC DRAM Memory Design, Validation, Architecture, or Test/Product Engineering.
  • Knowledge of high-performance memory subsystems including architecture, DDR controllers, PHY design, and high-speed IO (preferred).
  • Experience shipping high volume DRAMs or SoCs (preferred).
  • Experience working with major DRAM memory vendors and validating DRAM devices (preferred).
  • Ability to manage complex technical discussions, extract action plans, and summarize details for executive reporting.
  • Strong leadership skills and ability to manage multi-disciplined teams in a dynamic, schedule-driven environment.
  • Proven debugging skills and ability to resolve critical problems under pressure.

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