SoC DFT DV Engineer

Apple Inc

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Quick summary

Work type
On-site
Location
Waltham, MA
Salary
$134,700–$249,500 / yr
Posted
15 days ago
Freshness
Confirmed live yesterday

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $205k
This role $192k
$119k most similar roles pay here $280k

This role pays less than 61% of similar roles. Most pay $168,500–$241,750 — the shaded band above. At the midpoint, this role pays about $192k versus about $205k for comparable roles.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

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At a glance

TL;DR · SoC DFT DV Engineer

The SoC DFT DV Engineer joins a multifaceted team focused on hardware technology and complex system designs. In this role, you will review architecture and design specifications to extract features while developing attributes and verification plans. Your daily responsibilities include collaborating with designers to verify DFT implementation, running gate level simulations, debugging failures, and closing coverage. You will also build test benches, generate constrained random tests, and assist in creating automation scripts and regressions. The role involves coordinating with test engineers to bring up patterns on silicon while managing schedules for multi-functional engineering efforts. Required skills include experience in directed or random verification, coverage analysis, and assertions. You should be proficient in scripting languages such as Perl, Python, or TCL, and possess a strong understanding of general logic design within large processor or SoC environments.

What you'll do

  • Review architecture and design specifications to extract features and develop verification plans.
  • Verify DFT implementations and run various checks in coordination with designers.
  • Implement test benches and generate advised or constrained random tests.
  • Debug failures, perform gate level simulations, and manage bug tracking to close coverage.
  • Develop automation scripts and support verification flows and regressions.
  • Collaborate with test engineers to bring up test patterns on silicon.

What we're looking for

  • Bachelor's degree and 3 years of experience.
  • Proven experience in large processors and/or SoC designs (preferred).
  • Hands-on experience in directed or random verification, coverage analysis, and assertions (preferred).
  • Proficiency in scripting languages such as Perl, Python, or TCL (preferred).
  • Good knowledge of general logic design (preferred).
  • Exposure to DFT is a plus (preferred).
  • Excellent skills in problem solving and communication (preferred).

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SoC DFT DV Engineer

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Cupertino, CA 15 days ago $129,300–$194,700
DFT SoC Gate Level Simulation Python Perl TCL Coverage Analysis Assertions Test Benches Random Verification Scripting Logic Design

SoC DFT DV Engineer

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Waltham, MA 15 days ago $165,800–$292,400
DFT Design Verification Gate Level Simulation Python Perl TCL Object-Oriented Programming Coverage Analysis Assertions Pre-silicon Logic Design Scripting Test Benches
10+ yrs exp