SoC DFT DV Engineer

Apple Inc

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Quick summary

Work type
On-site
Location
Cupertino, CA
Salary
$129,300–$194,700 / yr
Posted
15 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $205k
This role $162k
$113k most similar roles pay here $281k

This role pays less than 80% of similar roles. Most pay $168,500–$241,750 — the shaded band above. At the midpoint, this role pays about $162k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

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At a glance

TL;DR · SoC DFT DV Engineer

As an SoC DFT DV Engineer, you will join a multifaceted team focused on hardware technology and complex system design. Your primary responsibilities involve reviewing architecture and design specifications, extracting features, and developing verification plans for DFT implementation. You will work closely with designers to run checks, implement test benches, generate constrained random tests, and debug failures through gate level simulations while managing coverage and schedules. The role involves supporting multi-functional engineering efforts by assisting in verification flows and automation scripts. To succeed, you must possess skills in directed or random verification, coverage analysis, and assertions. You should be proficient in scripting languages such as Perl, Python, or TCL. This position addresses the technical challenges of large processors and SoC designs, requiring a strong understanding of general logic design and DFT.

What you'll do

  • Review architecture and design specifications to extract features and develop verification plans.
  • Verify DFT implementations and run various checks in coordination with designers.
  • Implement test benches and generate advised or constrained random tests.
  • Debug failures, run gate level simulations, and manage bugs to close coverage.
  • Develop automation scripts and support verification flows and regressions.
  • Collaborate with test engineers to bring up test patterns on silicon.

What we're looking for

  • Proven experience in large processors and/or SOC designs (preferred).
  • Hands-on experience in directed or random verification, coverage analysis, and assertions (preferred).
  • Proficiency in scripting languages such as Perl, Python, or TCL (preferred).
  • Good knowledge of general logic design (preferred).
  • Exposure to DFT is a plus (preferred).
  • Excellent skills in problem solving and communication (preferred).
  • Bachelors Degree.

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