SoC DFT DV Engineer

The SoC DFT DV Engineer joins a multifaceted team focused on hardware technology and complex problem solving. In this role, you will review architecture and design specifications while extracting features to develop attributes and verification plans. You will collaborate with designers to verify DFT implementation, run various checks, and implement test benches using advised or constrained random tests. Daily responsibilities include debugging failures, running gate level simulations, supervising bugs, closing coverage, and managing schedules for multi-functional engineering efforts. You will also assist in verification flows, automation scripts, and regressions while working with test engineers to bring up patterns on silicon. Required skills include proficiency in Perl, Python, or TCL scripting, along with knowledge of logic design. The role addresses technical challenges within large processors and SoC designs through directed or random verification and coverage analysis.