Signal Integrity Engineer - Memory Interface

Apple Inc

Confirmed live yesterday Trusted

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$175,000–$308,500 / yr
Posted
15 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $201k
This role $242k
$131k most similar roles pay here $327k

This role pays more than 82% of similar roles. Most pay $168,500–$233,050 — the shaded band above. At the midpoint, this role pays about $242k versus about $201k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 2925 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2305 roles with salary data.

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At a glance

TL;DR · Signal Integrity Engineer - Memory Interface

The Signal Integrity Engineer – Memory Interface joins the team developing SoCs used within mobile devices. This role focuses on memory interface signal integrity from package to board, specifically addressing DDR and LPDDR interfaces. The engineer will perform electrical and physical design of memory systems, including extraction and validation of packages and motherboards. Key responsibilities involve conducting end-to-end signal and power integrity simulation studies for die, interposer, package, PCB, and PMU components to meet strict timing and voltage specifications. The candidate will collaborate with circuit and controller teams to optimize designs, provide floorplan guidelines, and perform feasibility studies for next-generation signaling schemes. Required skills include 2D/3D EM simulation tools, transmission line theory, Python programming, and experience with lab equipment like VNA, TDR, real-time scopes, and spectrum analyzers to correlate simulations with silicon measurements.

What you'll do

  • Conduct end-to-end signal and power integrity simulation studies for memory systems from die to PCB.
  • Model channels and power delivery networks to meet strict timing and voltage specifications.
  • Perform electrical extraction and validation of package and multi-layer board designs.
  • Develop and execute test plans to validate signal and power integrity.
  • Provide design guidelines and optimal IO settings to cross-functional engineering teams.
  • Conduct feasibility studies for next-generation signaling schemes.
  • Correlate simulation results with actual silicon measurements.
  • Debug and improve product yield in collaboration with product and system engineering teams.

What we're looking for

  • BS degree and 10 years of industry experience.
  • Prior design and modeling experience with DDR or LPDDR interfaces.
  • MSEE plus 8 years of experience or a Ph.D. (preferred).
  • Familiarity with signal and power integrity issues of memory interfaces (preferred).
  • Experience with package/board design, PI/SI methodology development, and lab correlation (preferred).
  • Proficiency in Python and using generative AI coding assistants (preferred).
  • Strong fundamentals in 3D/2D EM simulation tools and transmission line theory (preferred).
  • Familiarity with lab equipment such as VNA, TDR, real-time scope, and spectrum analyzers (preferred).

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