SerDes Design and Validation Engineer

What you'll do

• Lead the system bring-up, validation, and debugging of mixed-signal SerDes IP.
• Design and optimize high-performance analog circuits including receivers, transmitters, and clock distribution networks.
• Develop analog DFT circuits and techniques to ensure comprehensive PHY validation and first-time silicon success.
• Create test plans and analyze data to guarantee robust IP design and performance metrics.
• Coordinate with production test teams to debug complex design and system bring-up issues.
• Perform mixed-signal verification to understand SerDes operation and interaction with control logic.
• Implement high-speed serial link features such as Tx/Rx equalization, CDR architectures, and various protocols like PCIe or USB.

What we're looking for

• Experience in high-speed serial links (preferred).
• Expertise in designing analog mixed-signal circuit blocks such as Bandgap, LDOs, and amplifiers (preferred).
• Understanding of analog mixed-signal concepts like mismatch mitigation, linearity, and low-power techniques (preferred).
• Experience with digitally assisted analog design concepts like background calibrations and LMS based adaptive loops (preferred).
• Hands-on experience in lab/production testing, debug, and data analysis (preferred).
• Experience in AMS IC development from definition to high-volume production (preferred).
• Knowledge of SerDes protocols (PCIe, USB, DP, MPHY) and Tx/Rx equalization techniques (preferred).
• Bachelors degree.