SerDes Application Design Expert

Amd

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$200,000–$300,000 / yr
Posted
20 days ago
Freshness
Confirmed live today
Closes
Oct 6, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $179k
This role $250k
$104k $321k
below market most similar roles pay here above market

This role pays more than 86% of similar roles. Most pay $138,500–$220,469 — the blue band above. At the midpoint, this role pays about $250k versus about $179k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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View all roles at Amd

At a glance

TL;DR · SerDes Application Design Expert

The SerDes Application Design Expert joins the SCIO team to drive applications, firmware, and validation for next-generation high-speed serial interface IP across electrical and optical domains. This role involves bridging SerDes IP design teams and SoC integrators to develop low-level firmware for high-speed electrical SerDes and silicon photonics. Key responsibilities include first-silicon bring-up for PCIe and Ethernet protocols, driving IEEE compliance, and architecting characterization solutions from first silicon through volume production. The position requires expertise in physical-layer specifications, mixed-signal firmware production, and using lab instruments like high-speed scopes, BERT, and VNA. Candidates must utilize advanced scripting for test automation to improve data analysis and link stability. This role solves critical technical challenges in high-speed serial communication, ensuring performance against PCIe, IEEE, and OIF standards.

What you'll do

  • Lead first-silicon bring-up of SerDes PHYs for PCIe and Ethernet protocols.
  • Serve as the technical escalation point for customer SerDes issues across all production phases.
  • Drive PCIe and Ethernet IEEE compliance testing and develop automated regression suites.
  • Design, develop, and debug embedded firmware for high-speed electrical and optical SerDes systems.
  • Validate SerDes PHY functionality against design targets, product requirements, and industry standards.
  • Troubleshoot hardware issues and provide root cause analysis to designers and architects.
  • Develop test automation scripts to improve data analysis efficiency and customer-support tooling.

What we're looking for

  • Design, develop, and debug embedded firmware for high-speed SerDes systems in electrical and optical domains.
  • Perform first-silicon bring-up of SerDes PHYs across PCIe and Ethernet protocols.
  • Drive PCIe and Ethernet IEEE compliance, interop testing, and automated test script development.
  • Validate and characterize SerDes PHY functionality against design targets and industry standards like PCIe, IEEE, and OIF.
  • Troubleshoot issues and perform root cause analysis to provide feedback for next-generation IP improvements.
  • Develop test automation with advanced scripting and programming skills for data analysis and demo tooling.
  • Knowledge of physical-layer specifications and industry standards such as PCIe, IEEE 802.3 Ethernet, and OIF (preferred).
  • BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent (preferred).

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