This role pays more than
60%
of similar roles. Most pay
$166,613–$225,225
— the shaded band above.
At the midpoint, this role pays about
$208k
versus about
$196k
for comparable roles.
Based on 240 similar postings.
Employer
About Qualcomm
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has
621 open roles
on FindRole.
Listed pay typically runs
$147,900–$222,500
across 601 roles with salary data.
As a Senior Staff Digital Design Power Engineer within the ASICS Engineering group, you will lead a team focused on improving engineering efficiency and product quality while developing next-generation power control systems. You will work on silicon engineering using advanced technology nodes, managing the full VLSI development cycle including architecture, microarchitecture, and RTL design. Your daily responsibilities involve collaborating with verification, synthesis, and physical design teams to ensure design convergence. You will architect and design power control systems, specifically focusing on interfaces with external VR while optimizing system power consumption to minimize overhead. Additionally, you will mentor junior engineers, contribute to design reviews, and execute development plans. The role requires expertise in VLSI design cycles and advanced silicon engineering to solve complex power management challenges within high-performance integrated circuit environments.
ASIC
RTL
Verilog
VHDL
System Verilog
UPF
CPF
Conformal Low Power Check
Python
Tcl
Perl
DFT
Synthesis
Timing Closure
Power Analysis
Power Modeling
Prime Power
PowerArtist
PtPx
Silicon Power Architecture
Digital Design
Low Power Design
DVFS
Control Systems
Power Management
C
C++
Python
Perl
Linux
Windows
Oscilloscopes
Multimeters
Logic Analyzers
Firmware
GitHub Copilot
Claude