Senior Power and Performance Engineer

Nvidia

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Santa Clara, CA
Salary
$168,000–$264,500 / yr
Posted
17 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $185k
This role $216k
$132k most similar roles pay here $279k

This role pays more than 77% of similar roles. Most pay $153,100–$216,250 — the shaded band above. At the midpoint, this role pays about $216k versus about $185k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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View all roles at Nvidia

At a glance

TL;DR · Senior Power and Performance Engineer

As a Senior Power and Performance Engineer within the Silicon Co-design Group, you will join the ArchDev team to drive system-level feature development from architecture definition through silicon bringup. You will architect and integrate power management features, controllers, and policies to optimize efficiency for datacenter and client products while building roadmaps to address low-power and performance-per-watt needs. Your daily work involves prototyping, use-case analysis, cost-benefit trade-offs, and cross-functional collaboration with architecture, ASIC, board, software, and firmware teams to resolve complex issues. Required expertise includes silicon power architecture, digital design, DVFS, control systems, and hardware-software interaction. You should be proficient in C/C++, Python, or Perl within Windows or Linux environments. The role focuses on solving critical power and performance challenges by translating architectural trade-offs into engineering decisions for high-performance silicon products.

What you'll do

  • Architect and integrate system-level performance and power management features for datacenter and client products.
  • Develop feature roadmaps to address low-power, low-noise, and performance-per-watt requirements through prototyping and trade-off analysis.
  • Drive design decisions by coordinating with architecture, ASIC, board, software, firmware, and marketing teams.
  • Translate industry trends and market needs into forward-looking product roadmaps.
  • Lead debug efforts and develop workarounds for complex system issues.
  • Support silicon bringup, validation, manufacturing processes, and customer escalations.

What we're looking for

  • BS or MS in EE/CE or equivalent experience.
  • 8+ years of experience in silicon power architecture, system-level design, validation, and power/performance optimization.
  • Strong electrical engineering fundamentals including digital design, low power design, DVFS, control systems, and timing.
  • Solid understanding of firmware/driver structures and HW/SW interaction.
  • Programming proficiency in C/C++, Python, or Perl in Windows/Linux environments.
  • Familiarity with clocking, boot/reset flows, and system architecture (preferred).
  • Hands-on lab experience with oscilloscopes, multimeters, logic analyzers, and silicon bringup exposure (bonus).
  • Demonstrated cross-functional leadership and AI-assisted engineering fluency (preferred).

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