Senior SoC Verification Engineer

Arm Holdings

Confirmed live today High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Austin, TX
Salary
$161,500–$218,500 / yr
Posted
38 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $195k
This role $190k
$135k most similar roles pay here $235k

This role pays more than 52% of similar roles. Most pay $168,175–$222,250 — the shaded band above. At the midpoint, this role pays about $190k versus about $195k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 109 open roles on FindRole.

Listed pay typically runs $208,450–$282,050 across 108 roles with salary data.

Most-posted roles

View all roles at Arm Holdings

At a glance

TL;DR · Senior SoC Verification Engineer

Role Posting Log in to save

The Senior SoC Verification Engineer joins the Solution Engineering team to develop high-performance silicon demonstrators based on Arm IP compute sub-system solutions for mobile, infrastructure, and automotive markets. This role involves reviewing architecture and design specifications to build functional verification strategies, crafting test plans, developing SystemVerilog and Verilog testbenches, and debugging failures. The engineer will also improve verification methodologies and provide guidance to junior team members while collaborating on microarchitecture and system performance. Required expertise includes digital hardware design, Verilog HDL, and experience verifying subsystems for PCIe/CXL, DDRx/LPDDRx, and HBM. Technical skills include low-level programming in C and Assembler. Preferred qualifications include UVM/OVM methodologies, formal verification, clock domain crossing, power-aware verification, and scripting in Perl or Python to support the development of complex Arm SoCs on multiple emulation platforms.

Skills

SystemVerilog Verilog UVM OVM RTL PCIe CXL DDRx LPDDRx HBM Python Perl C Formal Verification Clock Domain Crossing Power Aware Verification Emulation

What you'll do

  • Review architecture and design specifications to develop functional verification strategies for SoC projects.
  • Create comprehensive test plans and track progress against project goals.
  • Develop SystemVerilog/Verilog testbenches and tests to verify RTL designs.
  • Debug test failures and resolve technical issues within the SoC integration.
  • Improve and evolve internal verification methodologies used by the engineering team.
  • Verify specific high-speed interfaces including PCIe, CXL, DDRx, LPDDRx, and HBM.
  • Mentor and provide technical guidance to junior team members.
  • Coordinate with project management to align on activities, plans, and schedules.

What we're looking for

  • Bachelor's or Master's degree in Computer Science, Electrical/Computer Engineering, or a similar field.
  • Over 5 years of experience in design or verification of sophisticated compute subsystems or SoCs.
  • Solid understanding of digital hardware design and Verilog HDL.
  • Experience verifying RTL for SoC projects and developing SystemVerilog/Verilog testbenches.
  • Detailed understanding of current verification strategies for sophisticated SoC development, including software-based techniques.
  • Experience verifying subsystems for PCIe/CXL, DDRx/LPDDRx, and HBM.
  • Low-level programming experience in C and Assembler.
  • Knowledge of Arm-based designs, UVM/OVM methodologies, formal verification, or scripting languages like Python and Perl (preferred).

Related searches

More Senior SoC Verification Engineer jobs Senior SoC Verification Engineer jobs in Austin All jobs at Arm Holdings

More like this

Similar roles

SoC Design Verification Engineer

Amd

San Jose, CA 67 days ago $141,760–$212,640
System Verilog UVM Verilog C++ C Python Perl SOC Architecture Computer Architecture AXI AHB PCIe DDR Functional Verification Performance Verification Code Coverage Functional Coverage
Hybrid
Save

Security IP Verification Engineer

Arm Holdings

Austin, TX 57 days ago $161,500–$218,500
SystemVerilog UVM Verilog C Python Perl Tcl Formal Verification AXI AHB Cryptography Secure Boot Hardware/Firmware Co-verification SoC Clock Domain Crossing
5+ yrs exp
Save

Senior Design Engineer

Arm Holdings

Austin, TX 16 days ago $161,500–$218,500
SoC RTL Verilog SystemVerilog PCIe DDR LPDDR HBM UCIe Ethernet Python Perl UVM OVM CDC RDC Linting Synthesis Timing Analysis DFT
7+ yrs exp
Save

Senior Verification Engineer, SoC

Nvidia

Santa Clara, CA +3 34 days ago $136,000–$218,500
ASIC Verification UVM System Verilog C++ Object-Oriented Programming SoC Architecture CPU Verification RTL FPGA Emulation
5+ yrs exp Hybrid
Save

Senior Verification Engineer

Nvidia

Santa Clara, CA 11 days ago $168,000–$264,500
UVM SystemVerilog Verilog Python C++ HLS VCS Verdi GDB DisplayPort HDMI MIPI DSI Assertion-based Verification Functional Coverage Constrained-random Version Control
10+ yrs exp Hybrid
Save