Staff DDR Analog Characterization Engineer

Arm Holdings

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Quick summary

Work type
On-site
Location
Chandler, AZ
Salary
$198,100–$268,000 / yr
Posted
44 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $205k
This role $233k
$146k most similar roles pay here $281k

This role pays more than 75% of similar roles. Most pay $172,000–$237,137 — the shaded band above. At the midpoint, this role pays about $233k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 105 open roles on FindRole.

Listed pay typically runs $209,100–$282,900 across 105 roles with salary data.

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At a glance

TL;DR · Staff DDR Analog Characterization Engineer

As a Staff DDR Analog Characterization Engineer, you will join the Chandler Post-Silicon Characterization team to validate and characterize next-generation DDR memory interfaces like DDR5 and LPDDR6. Your daily responsibilities include performing electrical margining, signal integrity measurements, and timing analysis to ensure reliable operation across various voltage, frequency, and temperature corners. You will develop test plans, implement automation tools, analyze data to resolve issues, and provide detailed documentation on findings. The role requires expertise in JEDEC specifications, memory training, and high-speed silicon processes. You will utilize laboratory equipment such as high-bandwidth oscilloscopes, active probes, logic analyzers, signal generators, and power measurement instrumentation. Additionally, you will use Python or similar scripting languages for automation while collaborating across teams to establish best validation practices for complex high-speed memory interfaces in a fast-paced environment.

What you'll do

  • Validate and characterize DDR memory interfaces using electrical margining and signal integrity measurements.
  • Conduct timing analysis to ensure functionality across various voltage, frequency, and temperature conditions.
  • Develop and implement comprehensive test plans and methodologies for silicon validation.
  • Analyze test data to identify, troubleshoot, and resolve performance issues.
  • Implement automation tools and scripts to improve testing efficiency.
  • Provide detailed documentation and reports on characterization results and findings.

What we're looking for

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with a GPA of 3.0 or higher.
  • Hands-on experience in DDR or LPDDR memory interface validation and characterization.
  • Proficiency in electrical margin and signal integrity measurements including eye diagrams, timing analysis, and DQ/DQS characterization.
  • Experience using high-bandwidth oscilloscopes, active probes, logic analyzers, signal generators, and power measurement instrumentation.
  • Strong understanding of DDR protocols, memory training, timing relationships, and JEDEC specifications.
  • Knowledge of silicon processes focusing on high-speed memory interfaces.
  • Experience developing automation using Python or similar scripting languages (preferred).
  • Ability to build positive relationships through collaboration and clear communication (preferred).

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