Senior Physical Design Methodology Engineer, PPA Improvement Technology Scaling

What you'll do

• Develop physical design methodologies for the implementation of graphics processors and SOCs.
• Create unique solutions to address state-of-the-art physical design problems for NVIDIA chips.
• Conduct PPA experiments for testing and developing new technologies for CPUs and GPUs.
• Execute chip floorplanning, power and clock distribution, chip assembly, and P&R.
• Perform timing analysis, closure, power and noise analysis, and back-end verification.
• Develop automation scripts to solve early design collaterals and analyze new library cells.
• Modify design constraints for new technologies using scripting languages like Perl, Python, and C++.

What we're looking for

• MS in Electrical or Computer Engineering or equivalent experience.
• Minimum 5 years of experience in Physical Design Engineering.
• Familiarity with floor planning, clock and power distribution, place and route, integration, and verification.
• Strong background in hierarchical design approach, top-down design, budgeting, timing, and physical convergence.
• Familiarity with design for yield, manufacturability, EM and IR closure, and thermal management.
• Expertise and in-depth knowledge of industry standard EDA tools.
• Proficiency in programming and scripting languages such as Perl, Python, and C++.
• Experience with physical design related to CPU designs (preferred).