Senior Packaging Technical Engineer

Nvidia

Confirmed live 2 days ago High trust

Remote

Quick summary

Work type: Remote
Location: Santa Clara, CATX
Salary: $168,000–$258,750 / yr
Employment: Full-time
Posted: 6 days ago
Freshness: Confirmed live 2 days ago
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $188k

This role $213k

$139k $272k

below market most similar roles pay here above market

This role pays more than 69% of similar roles. Most pay $160,000–$216,250 — the blue band above. At the midpoint, this role pays about $213k versus about $188k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1626 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1115 roles with salary data.

Most-posted roles

View all roles at Nvidia

At a glance

TL;DR · Senior Packaging Technical Engineer

Role Posting Log in to save

The Senior Packaging Technical Engineer - Hardware joins a dynamic team to drive technology across multiple functions. This role focuses on crafting and implementing silicon pad rings while working with various package technology types and complex technologies. The engineer will define the chip pad ring, substrate interconnect scheme, and lead the package layout design process. Daily tasks include defining chip floor plans, substrates, and ball outs to implement a robust electrical package. Collaboration involves working with Circuit, Signal Integrity, RTL, Place and Route, and system design teams. Required skills include a BSEE or equivalent experience, board design expertise, and knowledge of transmission line theory, power delivery, and signal integrity. Preferred technical proficiencies include programming in Perl, Python, Tcl, Cadence Skill, and Excel.

Skills

Package Design Chip Pad Ring Substrate Interconnect Package Layout Design Signal Integrity Power Delivery Transmission Line Theory Python Perl Tcl Cadence Skill Excel RTL Place and Route

What you'll do

Define and implement the chip pad ring and substrate interconnect scheme.
Lead the package layout design process for complex technologies.
Define the chip floor plan, pad ring, substrate, and ball out.
Implement a robust, world-class electrical package.
Work with various package technology types and complex technologies.
Solve complex technical problems related to transmission line theory and power delivery.

What we're looking for

BSEE or equivalent experience.
Minimum of 8+ years in board/system design.
Experience with package design (preferred).
Good understanding of transmission line theory, power delivery, and signal integrity (preferred).
Programming and scripting skills in Perl, Python, and Tcl (preferred).
Familiarity with Cadence Skill and EXCEL (preferred).
Ability to work with a minimum of supervision and solve complex technical problems.

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