Senior Mixed Signal Design Engineer

Nvidia

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $168,000–$264,500 / yr
Employment: Full-time
Posted: 2 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $191k

This role $216k

$136k $278k

below market most similar roles pay here above market

This role pays more than 76% of similar roles. Most pay $165,825–$216,250 — the blue band above. At the midpoint, this role pays about $216k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1668 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 657 roles with salary data.

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At a glance

TL;DR · Senior Mixed Signal Design Engineer

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JOB TITLE: Senior Mixed Signal Design Engineer The Senior Mixed Signal Design Engineer joins a rapidly growing team of creative circuit development engineers focused on pushing the frontiers of high-speed DRAM SerDes solutions. This role involves mixed-signal and analog circuit design for high-speed memory I/O interfaces, where the engineer will solve complex circuit design challenges in the latest CMOS FinFET processes. Responsibilities include taking designs through productization, collaborating with multi-functional teams to optimize designs, and contributing to the architecture definition of next-generation memory systems. Required expertise includes deep submicron CMOS FinFET process knowledge, device reliability, ESD, and Latch-Up requirements. Candidates must utilize Cadence custom development tools, Hspice, XA, FineSim, and Spectre. Experience with Verilog, Matlab, and silicon debug using lab test and measurement equipment is also highly valued.

Skills

Analog Circuit Design SerDes CMOS FinFET DRAM LPDDR5 DDR4 DDR5 GDDR5 HBM3 Cadence Hspice XA FineSim Spectre Verilog Matlab Silicon Debug ESD Latch-Up

What you'll do

Design mixed-signal and analog circuits for high-speed memory I/O interfaces.
Solve complex circuit design challenges using the latest CMOS FinFET processes.
Manage designs through all stages of the productization and development lifecycle.
Optimize designs in coordination with multi-functional engineering teams.
Contribute to the architecture definition of next-generation memory systems and interfaces.
Analyze system-level timing budgets, specifications, and performance requirements.

What we're looking for

MS/PhD in Electrical Engineering or equivalent experience.
4+ years of high-speed DRAM (LPDDR5/6, DDR4/5, GDDR5/6/7, HBM3/4) or other SerDes interface related design experience.
In-depth understanding of deep submicron CMOS FinFET process and related circuit design issues.
Familiarity with device reliability, ESD, and Latch-Up requirements.
Understanding of system-level timing budgets, specs, and analysis.
Strong background in Cadence custom development tools and simulators like Hspice, XA, FineSim, and Spectre.
Solid understanding of package substrate, board development, and power delivery (preferred).
Knowledge of Verilog, Nanotime, Matlab, or similar tools (preferred).
Hands-on experience with silicon debug using lab test and measurement equipment (preferred).

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