Senior Mixed Signal Design Engineer

Nvidia

Confirmed live today High trust

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $136,000–$218,500 / yr
Employment: Full-time
Posted: 5 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $193k

This role $177k

$125k $236k

below market most similar roles pay here above market

This role pays less than 57% of similar roles. Most pay $169,500–$216,250 — the blue band above. At the midpoint, this role pays about $177k versus about $193k for comparable roles.

Based on 240 similar postings.

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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1792 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1179 roles with salary data.

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At a glance

TL;DR · Senior Mixed Signal Design Engineer

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The Senior Mixed Signal Design Engineer joins the mixed-signal design team to build next generation NVLINK. This role involves developing and implementing high speed interfaces and analog circuits, taking innovative integrated circuit designs at data rates of 25Gbps and higher from concept through silicon characterization. Key responsibilities include defining circuit requirements, completing designs from schematic to layout and verification, and providing support for post-silicon bring-up and debugging. The engineer will use deep-submicron CMOS technologies and industry standard EDA tools including Cadence Virtuoso, Spectre, Hspice, Finesim, and XA. Required skills include behavioral modeling of analog and digital circuits, noise analysis, loop stability analysis, and monte-carlo simulations. The work focuses on solving complex technical problems for product lines ranging from consumer graphics to self-driving cars and artificial intelligence.

Skills

Mixed-Signal Design CMOS FINFET Cadence Virtuoso Spectre Hspice Finesim XA Schematic Design Layout Circuit Verification Behavioral Modeling high speed interfaces Silicon Characterization

What you'll do

Develop and implement high-speed interfaces and analog circuits for next-generation NVLINK.
Manage integrated circuit designs from initial concept through silicon characterization at 25Gbps+ data rates.
Define circuit requirements and complete full design cycles including schematic, layout, and verification.
Conduct schematic design of deep-submicron CMOS technologies using Spectre or Hspice.
Own the architecture, transistor design, and verification using Cadence Virtuoso.
Optimize circuits to meet specific system performance requirements.
Provide detailed floorplans and guidance for matching and high-speed routings to layout engineers.
Provide technical support for post-silicon bring-up and debugging.

What we're looking for

Master's or PhD in Electrical Engineering, Computer Engineering, or a related field with a strong analog design background (or equivalent experience).
At least 2 years of industry experience in CMOS Analog / Mixed Signal Circuit Design.
Experience in deep sub-micron process design, specifically with FINFET.
Experience with design and verification tools including Cadence Virtuoso, Spectre, HSpice, Finesim, and XA.
Experience in crafting test bench environments for component and top-level circuit verification.
Ability to perform behavioral modeling of analog and digital circuits.
Proficiency in analog simulation for noise analysis, loop stability, ac/dc/tran analysis, and Monte-Carlo.
Strong interpersonal skills and the ability to work as a great teammate (preferred).

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