Senior Manager, Test, Manufacturability, Reliability and Quality

Nvidia

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Work type
On-site
Location
Santa Clara, CA
Employment
Full-time
Posted
34 days ago
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Confirmed live today

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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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TL;DR · Senior Manager, Test, Manufacturability, Reliability and Quality

The Senior Manager, Test, Manufacturability, Reliability and Quality leads the Test, Manufacturability, Reliability & Quality organization within the Silicon Co-Design Group. This leader manages a team of individual contributors and a first-line manager to oversee production test development, including SLT, BLT, and system reliability stress like HTOL. The role involves closing multi-functional failures, resolving Vmin and binning escapes, and conducting root-cause analysis on field returns. Key responsibilities include converting integration signals into decision-ready options and refining methodologies to improve first-pass yield and test-time reduction. Candidates must possess expertise in DFT, BIST, digital design, computer architecture, and FinFET-class manufacturing processes. The position addresses the technical challenges of moving GPU, SoC, and CPU silicon from first power-on to high-volume production while managing platform and board-level manufacturing issues.

What you'll do

  • Own the technical execution and velocity of SLT, BLT, and system reliability stress (HTOL) across all silicon programs.
  • Drive root-cause analysis and productized fixes for Vmin escapes, performance shortfalls, and power anomalies across design and manufacturing.
  • Convert raw integration signals and RMA trends into decision-ready options for executive leadership regarding production gates and ramp risks.
  • Establish operational objectives to improve cycle time, first-pass yield, test-time reduction, and DPPM.
  • Conduct root-cause analysis on field returns to develop screening, process, and build changes that prevent recurring escapes.
  • Hire, develop, and retain a team of engineers and first-line managers across multiple geographies.
  • Use AI tools deliberately to improve production test workflows while managing associated risks.

What we're looking for

  • BS, MS, or PhD in Electrical Engineering, Computer Engineering, Systems Engineering, or a related field (or equivalent experience).
  • 12+ years of experience in production test, system validation, post-silicon integration, or reliability engineering in a high-volume silicon environment.
  • 5+ years of experience in a management role.
  • Strong EE fundamentals in DFT, BIST, digital design, computer architecture, fault models, fault analysis, power and timing analysis, sampling, and statistics.
  • Hands-on expertise in production test stack (ATE, SLT, BLT), Control Run methodology, FinFET-class manufacturing processes, and PVT/binning dependencies.
  • Background in GPU, CPU, AI accelerator, or other large-SoC programs (preferred).
  • Experience applying AI tools in production test or debug workflows (preferred).
  • Track record of building and retaining senior technical talent and guiding first-line managers to become autonomous leaders (preferred).

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