Senior System Level Testability Engineer

Nvidia

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
—
Salary
$168,000–$264,500 / yr
Employment
Full-time
Posted
11 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $180k
This role $216k
$128k most similar roles pay here $279k

This role pays more than 81% of similar roles. Most pay $146,500–$213,375 — the shaded band above. At the midpoint, this role pays about $216k versus about $180k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1371 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1096 roles with salary data.

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View all roles at Nvidia

At a glance

TL;DR · Senior System Level Testability Engineer

The Senior System Level Testability Engineer joins the TMRQ team within the Silicon Co-Design Group to manage system-level diagnostics, verification, and post-silicon validation for complex semiconductor chips. This role involves defining production coverage specifications, translating product requirements into test coverage, and collaborating with hardware engineering teams to determine coverage needs and constraints. The engineer will develop testing flows, fine-tune speed, power, performance, yield, and quality on pre-production silicon, while performing root cause analysis to improve production workflows. Required skills include strong electrical engineering fundamentals, digital design knowledge, signal integrity, statistics, timing analysis, fault analysis, and computer architecture. Candidates must possess hands-on lab experience with silicon bring-up and debug. Technical proficiency in Python, BASH, and Linux is required to support the development of test infrastructure and data collection features for high-volume manufacturing environments.

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