ASIC FPGA Engineer
General Dynamics
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How this pay compares to similar roles
This role pays less than 80% of similar roles. Most pay $169,591–$216,250 — the shaded band above. At the midpoint, this role pays about $164k versus about $193k for comparable roles.
Based on 240 similar postings.
Employer
General Dynamics is a global aerospace and defense company offering a broad portfolio of products and services in business aviation, ship construction, land combat vehicles, and information technology. It serves customers in the U.S. government, allied governments, and a diverse array of commercial markets.
General Dynamics currently has 1123 open roles on FindRole.
Listed pay typically runs $124,093–$150,385 across 984 roles with salary data.
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At a glance
The Senior FPGA Engineer joins the engineering team to lead the definition, design, verification, and documentation of Field Programmable Gate Array developments. This role involves determining architecture, system simulation, and detailed design approaches while defining module interfaces and evaluating process flows including synthesis, place and route, timing, and power utilization. The engineer will create test plans, analyze performance results, and manage technical work products for internal and external use. Key technical requirements include extensive experience with Microchip Polarfire FPGAs, SystemVerilog for development, and UVM for verification. Additionally, the role requires proficiency in Microsoft Office and a strong understanding of project leadership principles like Earned Value and Cost Account Management. The position focuses on solving complex engineering problems through creative design, research, and technical oversight within the defense and scientific domains.
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