Senior FPGA & Emulation Performance Engineer

Arm Holdings

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Austin, TX
Salary
$161,500–$218,500 / yr
Posted
55 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $200k
This role $190k
$150k most similar roles pay here $233k

This role pays more than 50% of similar roles. Most pay $177,250–$222,000 — the shaded band above. At the midpoint, this role pays about $190k versus about $200k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 39 open roles on FindRole.

Listed pay typically runs $208,450–$282,050 across 38 roles with salary data.

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View all roles at Arm Holdings

At a glance

TL;DR · Senior FPGA & Emulation Performance Engineer

As a Senior FPGA & Emulation Performance Engineer within the Productivity Engineering Group, you will improve the performance, utilization, and availability of global hardware acceleration infrastructure. You will be responsible for benchmarking emulation and FPGA workloads to establish baselines, optimizing scheduling and recovery mechanisms to increase job throughput, and integrating EDA vendor APIs to automate resource management. Your daily work involves developing data pipelines and performance dashboards to visualize trends while collaborating with in-house teams and EDA tool vendors like Cadence, Synopsys, and Siemens. The role requires expertise in hardware emulation and FPGA environments, Linux systems, and scripting using Python or Bash. You will utilize Prometheus and Grafana for system visibility to solve complex problems regarding platform throughput and engineering productivity within large-scale verification environments involving model builds, partitioning, mapping, and execution.

What you'll do

  • Benchmark emulation and FPGA workloads to quantify performance and utilization baselines.
  • Optimize scheduling, queuing, and recovery mechanisms to improve system availability and job throughput.
  • Integrate with EDA vendor APIs to automate resource management and streamline job orchestration.
  • Develop data pipelines and performance dashboards to visualize trends and identify inefficiencies.
  • Partner with EDA tool vendors to validate and deploy performance enhancements in production workloads.
  • Drive continuous improvement through automation and workflow optimization of hardware acceleration infrastructure.

What we're looking for

  • Minimum 5 years of experience in hardware emulation and FPGA environments.
  • Proven ability to benchmark and profile emulation workloads and interpret performance data.
  • Understanding of emulation and FPGA prototyping workflows including build, compile, partitioning, and mapping.
  • Experience integrating vendor APIs or SDKs into custom automation or monitoring solutions.
  • Familiarity with scheduler design and integration.
  • Proficiency in Linux-based environments and scripting using Python and Bash.
  • Familiarity with Prometheus, Grafana, or similar metrics frameworks for system visibility.

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