Senior FPGA & Emulation Performance Engineer

Arm Holdings

Confirmed live yesterday Trusted

Hybrid

Quick summary

Work type: Hybrid
Location: Austin, TX
Salary: $161,500–$218,500 / yr
Posted: 161 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $192k

This role $190k

$143k $234k

below market most similar roles pay here above market

This role pays more than 52% of similar roles. Most pay $168,225–$216,250 — the blue band above. At the midpoint, this role pays about $190k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 113 open roles on FindRole.

Listed pay typically runs $208,450–$282,050 across 112 roles with salary data.

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At a glance

TL;DR · Senior FPGA & Emulation Performance Engineer

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The Senior FPGA & Emulation Performance Engineer joins the Productivity Engineering Group to improve the performance, utilization, and availability of global hardware acceleration infrastructure. This role involves benchmarking emulation and FPGA workloads to quantify performance baselines, optimizing scheduling and queuing mechanisms, and integrating with EDA vendor APIs to automate resource management. You will develop data pipelines and performance dashboards to visualize trends and guide tuning efforts while collaborating with in-house scheduler teams. Required expertise includes hardware emulation and FPGA environments, benchmarking, and Linux-based scripting using Python and Bash. You must understand emulation prototyping workflows, including model build, partitioning, and mapping. The role utilizes Prometheus and Grafana for system visibility to solve technical challenges regarding platform throughput and engineering productivity within large-scale verification environments.

Skills

FPGA Hardware Emulation Python Bash Linux Prometheus Grafana Workflow Orchestration Scheduling Data Pipelines Benchmarking

What you'll do

Benchmark emulation and FPGA workloads to quantify performance baselines and track improvements.
Optimize scheduling, queuing, and recovery mechanisms to improve system availability and job throughput.
Integrate with EDA vendor APIs to automate resource management and streamline job orchestration.
Develop data pipelines and performance dashboards to visualize trends and detect inefficiencies.
Partner with EDA tool vendors to validate and deploy performance enhancements in production workloads.
Drive continuous improvement through automation and workflow optimization.

What we're looking for

Minimum 5 years of experience in hardware emulation and FPGA environments.
Proven ability to benchmark and profile emulation workloads and interpret performance data.
Understanding of emulation and FPGA prototyping workflows including model build, compile, partitioning, and mapping.
Experience integrating vendor APIs or SDKs into custom automation or monitoring solutions.
Familiarity with scheduler design and integration.
Proficiency in Linux-based environments and scripting using Python and Bash.
Familiarity with Prometheus, Grafana, or similar metrics frameworks for system visibility.
Experience building workflow orchestration or monitoring tools for large-scale verification environments (preferred).

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