Senior Circuit Design Engineer

Nvidia

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$136,000–$218,500 / yr
Posted
81 days ago

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Competitive pay

How this pay compares to similar roles

Similar $190k
This role $177k
$126k most similar roles pay here $228k

This role pays more than 60% of similar roles. Most pay $164,575–$216,250 — the shaded band above. At the midpoint, this role pays about $177k versus about $190k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 985 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 971 roles with salary data.

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At a glance

TL;DR · Senior Circuit Design Engineer

As a Senior Circuit Design Engineer at NVIDIA, you will join the cutting-edge Inference team to work on standard cell libraries and custom ROM modules in deep submicron technologies. Your responsibilities include driving transistor-level circuit design, modeling, and performance analysis, leading verification processes for new designs, and developing innovative simulations for design margin evaluations. You will collaborate closely with cross-functional teams to enhance quality checks and improve existing tools and flows. Ideal candidates have a strong background in electrical or computer engineering, 5+ years of experience in deep submicron process issues, and hands-on expertise with SPICE simulation, EM/IR analysis, and DRC/LVS debugging. Proficiency in scripting languages like Perl, Tcl, and Make is beneficial for automation tasks. This role demands a deep understanding of standard cell libraries and custom ROMs, along with experience designing flip-flops, level shifters, math cells, and SRAM, all while contributing to NVIDIA’s mission to advance GPU-accelerated Deep Learning software.

What you'll do

  • Drive the development of cutting-edge standard cell libraries in deep submicron technologies.
  • Lead the modeling and performance analysis for transistor-level circuit design.
  • Verify new ROM designs and establish innovative design flows.
  • Develop simulations to evaluate design margins and support existing tools.
  • Collaborate on improving quality checks for standard cell libraries.

What we're looking for

  • MS in Electrical or Computer Engineering with 5+ years of experience.
  • Deep expertise in deep submicron process issues and standard cell libraries/ROMs.
  • Proficient in SPICE simulation and adapting to new simulation tools.
  • Experience with EM/IR, aging, noise, margin, and high sigma variation simulations.
  • Hands-on DRC/LVS debug skills and collaboration with mask designers.

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