RTL Tools & Methodology Engineer

Amd

Confirmed live 2 days ago High trust

Hybrid

Quick summary

Work type: Hybrid
Location: San Jose, CA
Salary: $141,760–$212,640 / yr
Posted: 135 days ago
Freshness: Confirmed live 2 days ago
Closes: Apr 28, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $187k

This role $177k

$132k most similar roles pay here $235k

This role pays less than 58% of similar roles. Most pay $159,525–$214,000 — the shaded band above. At the midpoint, this role pays about $177k versus about $187k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 367 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 367 roles with salary data.

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View all roles at Amd

At a glance

TL;DR · RTL Tools & Methodology Engineer

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As an RTL Tools & Methodology Engineer on the RTL Design Methodology team, you will serve as a Hardware Development Engineer focused on developing next-generation FPGA products. You will work closely with RTL designers and verification engineers to define, deploy, and improve front-end design and static verification flows to ensure high-quality silicon. Your daily responsibilities include driving improvements in methodologies for Lint, CDC, formal equivalence, and low-power verification while utilizing corporate AI systems to streamline workflows. The role requires proficiency in logic design and static verification using SystemVerilog, Verilog, or VHDL. Additionally, you must possess programming skills in Perl, Python, and TCL. This position addresses the technical challenge of improving design productivity and quality within the FPGA development domain by enhancing the tools and methodologies used across the entire engineering organization.

Skills

RTL SystemVerilog Verilog VHDL Lint CDC Formal Equivalence Low-power Verification Python Perl TCL FPGA Static Verification Logic Design

What you'll do

Develop and improve methodologies and tools for high-quality RTL design across the organization.
Support the deployment of front-end design and static verification flows to ensure robust silicon.
Drive continuous improvements in Lint, CDC, formal equivalence, and low-power verification processes.
Collaborate with design and verification teams to enhance engineering workflows and productivity.
Utilize corporate AI systems to streamline internal workflows and increase team efficiency.
Build and maintain the RTL design and static verification tool ecosystem for FPGA products.

What we're looking for

Bachelor's degree in Electrical or Computer Engineering.
Master's or PhD degree preferred.
Experience in logic design and static verification using SystemVerilog, Verilog, or VHDL.
Strong background in RTL/logic design.
Programming skills in Perl, Python, and TCL.

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