RTL Design Engineer

Apple Inc

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Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$175,000–$308,500 / yr
Posted
17 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $199k
This role $242k
$131k most similar roles pay here $327k

This role pays more than 84% of similar roles. Most pay $168,000–$229,100 — the shaded band above. At the midpoint, this role pays about $242k versus about $199k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3587 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2768 roles with salary data.

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At a glance

TL;DR · RTL Design Engineer

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The RTL Design Engineer joins the mixed-signal silicon design team to develop, verify, and support the lab bring-up of sophisticated digital and mixed-signal circuits with signal processing capabilities. This role involves micro-architecting digital blocks, performing RTL coding for DSP algorithms, and ensuring formal equivalence between custom designs and abstract representations. The engineer will translate complex concepts like filtering and modulation into high-performance hardware implementations while collaborating with analog designers and system architects. Key technical requirements include proficiency in Verilog, SystemVerilog, and scripting languages such as Perl and Python. Candidates should possess expertise in synthesis, static timing analysis, design-for-test, and advanced verification techniques including assertions. The role addresses the integration of high-performance mixed-signal IPs into high-speed digital circuits while utilizing GenAI tools for hardware design optimization and validation within a complex semiconductor environment.

Skills

Verilog SystemVerilog RTL Design DSP Formal Verification Synthesis Static Timing Analysis DFT Python Perl Hardware-Software Co-design Low-power Design Lab Bring-up Signal Processing Clock-domain Crossing

What you'll do

  • Micro-architect and specify digital and signal processing blocks within mixed-signal circuits.
  • Develop and optimize RTL code using Verilog and SystemVerilog for high-performance pipelines.
  • Translate DSP concepts like filtering, transforms, and modulation into efficient hardware implementations.
  • Write comprehensive assertions and unit-level testbenches to perform functional verification.
  • Integrate complex IPs and ensure formal equivalence between custom designs and abstract representations.
  • Support lab bring-up by writing test scripts and analyzing silicon performance data.
  • Validate signal processing performance through experimental design and data analysis.

What we're looking for

  • Bachelor of Science degree.
  • Minimum of 10 years of relevant industry experience.
  • Experience developing and optimizing RTL code in Verilog/SystemVerilog for mixed-signal digital blocks and signal processing pipelines.
  • Ability to translate DSP concepts into high-performance RTL implementations.
  • Proficiency in writing assertions, unit-level testbenches, and participating in functional verification.
  • Expertise in front-end tools, synthesis, static timing analysis, and design-for-test (DFT) (preferred).
  • Experience with SystemVerilog assertions, scripting languages (Perl, Python), formal verification, and low-power design (preferred).
  • Proficiency in hardware-software co-design, hands-on DSP experience, and advanced GenAI usage for hardware design (preferred).

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