RFIC - PLL Design Engineer

What you'll do

• Design and develop analog and digital PLL building blocks including VCO, DCO, MMD, PFD, and filters.
• Develop top-level designs for both PLLs and LOGEN components.
• Perform feasibility studies and trade-off analyses to define circuit requirements from concept to transistor-level design.
• Manage layout, floor planning, and verification processes to ensure successful tape-outs.
• Collaborate with RF systems teams to define block specifications and manage margin distribution across the chain.
• Address co-existence scenarios to ensure designs meet all wireless performance requirements.
• Partner with test engineers to debug, optimize, and correlate silicon measurements against design specifications for mass production.

What we're looking for

• Minimum requirement of a bachelor's degree.
• Ph.D. degree is preferred.
• Experience in design and development of Analog and Digital PLLs and LOGEN for high performance applications.
• Hands-on experience designing building blocks including TDC, Digital Filters, Sigma Delta Modulators, Pre-scalers, MMD, DCO/VCOs, and PFD/CP.
• Understanding of analog, mixed-signal, and RF circuit design concepts such as LNAs, PAs, mixers, and baseband filters.
• Familiarity with mixed-signal mode verification methodology using SystemVerilog or AMS.
• Experience in PLL and LOGEN silicon characterization and debug.
• Proficiency with tools including Cadence Virtuoso, Spectre RF, Matlab, and EM simulation software like EMX or HFSS.