R&D Engineer IC Design

Broadcom

Quick summary

Work type: On-site
Location: Irvine, CA · Broomfield, CO
Salary: $108,000–$172,800 / yr
Posted: 96 days ago
Closes: Aug 15, 2026

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $185k

This role $140k

$95k most similar roles pay here $232k

This role pays less than 87% of similar roles. Most pay $156,000–$214,600 — the shaded band above. At the midpoint, this role pays about $140k versus about $185k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 61 open roles on FindRole.

Listed pay typically runs $120,000–$192,000 across 60 roles with salary data.

Most-posted roles

View all roles at Broadcom

At a glance

TL;DR · R&D Engineer IC Design

Apply Now Log in to save

Join our dynamic IC design team as an R&D Engineer, contributing to the development of cutting-edge silicon technology for AI/ML and cloud operators. You will work on advanced Ethernet/IP switching products for multi-scale data centers, collaborating with global teams to create innovative solutions. Your daily tasks include designing complex IP blocks, conducting front-end design activities, and performing detailed Si debug. Ideal candidates have a BSEE with 8+ years or MSEE with 6+ years of experience in RTL design, along with strong scripting skills using Python or Perl. You must excel at communication and documentation while being both self-motivated and collaborative. This role offers the chance to shape next-generation AI/ML networks and cloud infrastructure on a large scale.

Skills

Python Perl RTL design Ethernet/IP switching Docker CI/CD PostgreSQL Kubernetes AWS Terraform

What you'll do

Develop complex IP blocks for Ethernet/IP switching in multi-scale data centers.
Contribute to the design and Si debug of leading-edge products in IC technology.
Work with worldwide teams to create new lines of devices for AI/ML and cloud operators.
Design front-end components for advanced silicon technology used in next-gen networks.
Automate design processes using Python or Perl scripting languages.

What we're looking for

BSEE with 8+ years or MSEE with 6+ years in RTL design.
Strong background in front-end IC design and Si debug.
Experience in designing complex IP blocks for Ethernet/IP switching.
Proficiency in Python/Perl scripting and automation tools.
Excellent communication and documentation skills required.
Must be a self-starter and effective team player.

Similar roles

R&D IC Design Engineer

Broadcom

Irvine, CA 19 days ago $127,100–$203,400

Verilog VHDL Python C Unix Perl DSP ARM High-speed digital circuit design 10G/100G Ethernet OTN network Error correction code RTL simulation Synthesis High-level Synthesis Design for low power Design for test Design for manufacturing IC development flow Silicon volume production qualification

Save

Senior Software R&D Engineer, VLSI Physical Design

Nvidia

Santa Clara, CA 9 days ago $168,000–$264,500

C++ Python ICCAD tools Innovus Computational geometry Graph theory Algorithm development Multithreading Distributed computing High performance software design GUI development Machine learning VLSI Physical Design

Hybrid

Save

Sr. IC Package Design Engineer (Silicon Engineering)

SpaceX

Irvine, CA 2 days ago $160,000–$225,000

Cadence APD+/SIP SIWave HFSS ADS BGA Co-packaged Optics (CPO) Signal Integrity (SI) Power Integrity (PI) EM Simulation Package Design Electrical Review Substrate Design RFIC ASIC Manufacturing Reviews

Save

Sr. IC Package Design Engineer (Silicon Engineering)

SpaceX

Austin, TX 2 days ago

Cadence APD+/SIP SIWave HFSS ADS BGA Co-packaged Optics (CPO) Signal Integrity (SI) Power Integrity (PI) EM simulation Package design electrical review Substrate design RF Digital High-speed and mixed signal die Package/SIP layout

Save

R&D IC Design Engineer

Broadcom

Irvine, CA 159 days ago $141,300–$226,000

Verilog VHDL Python C Unix Perl RTL simulation synthesis FEC design digital signal processing high speed digital circuit design ARM subsystem 10G/100G/200G/400G/800G Ethernet OTN network design for low power design for test design for manufacturing

Save

R&D Engineer IC Design 4

Broadcom

Austin, TX 16 days ago $108,000–$172,800

TCL Perl Synopsys Design Compiler Cadence RTL Compiler Primetime Liberty LIB models Synopsys Formality Cadence Conformal Spyglass Lint DFT svn git

Save