R&D IC Design Engineer

Broadcom

Quick summary

Work type: On-site
Location: Irvine, CA
Salary: $127,100–$203,400 / yr
Posted: 19 days ago
Closes: Jun 18, 2026

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $183k

This role $165k

$116k most similar roles pay here $229k

This role pays less than 65% of similar roles. Most pay $152,875–$213,375 — the shaded band above. At the midpoint, this role pays about $165k versus about $183k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 61 open roles on FindRole.

Listed pay typically runs $120,000–$192,000 across 60 roles with salary data.

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At a glance

TL;DR · R&D IC Design Engineer

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As a senior chip design engineer on the high-speed communication team, you will architect block-level designs enabling 10Gbps to 400Gbps data transmission across various mediums including backplane, cable, and optical fiber. Your daily tasks include translating marketing and system requirements into detailed design specifications, conducting HDL coding, equivalency checking, timing analysis, and simulation scripting for IC design validation. You will also develop verification plans, perform power and resource trade-off analyses, and ensure low-power and testability in your designs. Essential skills include expertise in ARM subsystems, high-speed digital circuit design, 10G/100G Ethernet, OTN networks, RTL simulation, synthesis, and scripting languages like Verilog, VHDL, Unix/Perl, Python, and C. Experience with High-level Synthesis is beneficial. This role requires strong analytical skills, hands-on debugging experience, and the ability to collaborate effectively in a global team environment.

Skills

Verilog VHDL Python C Unix Perl DSP ARM High-speed digital circuit design 10G/100G Ethernet OTN network Error correction code RTL simulation Synthesis High-level Synthesis Design for low power Design for test Design for manufacturing IC development flow Silicon volume production qualification

What you'll do

Develop block level design specifications for high-speed communication chips.
Conduct detailed HDL coding, equivalency checking, and timing analysis for ICs.
Generate verification plans and perform silicon debugging for complex designs.
Analyze power consumption, die size, and schedule trade-offs in chip development.
Script various IC tasks including STA, test bench creation, and simulations.
Ensure design meets low-power, testability, and manufacturing requirements.

What we're looking for

Minimum 10 years of experience in chip design or related field.
Strong knowledge of high-speed digital circuit design and ARM subsystems.
Proficiency in Verilog, VHDL, Unix/Perl scripting, and Python/C for ASIC development.
Expertise in low-power design, testability, and manufacturing processes.
Experience with RTL simulation, synthesis, and silicon debugging required.
Ability to perform detailed design document creation and schedule management.
Excellent analytical skills and hands-on lab experience in problem-solving.

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