Principal Technical Project Manager, ASIC

Samsung Semiconductor

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$189,000–$301,000 / yr
Posted
today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $199k
This role $245k
$136k most similar roles pay here $319k

This role pays more than 81% of similar roles. Most pay $162,000–$235,800 — the shaded band above. At the midpoint, this role pays about $245k versus about $199k for comparable roles.

Based on 237 similar postings.

Employer

About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 54 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 54 roles with salary data.

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View all roles at Samsung Semiconductor

At a glance

TL;DR · Principal Technical Project Manager, ASIC

As a Principal Technical Project Manager for ASIC at Samsung’s Custom SoC Solutions Team, you will lead complex silicon development projects from concept to post-silicon validation, ensuring timely delivery and collaboration with various internal teams such as architecture, verification, physical design, firmware, and foundry. Your responsibilities include developing detailed project plans, managing cross-functional coordination, and mitigating risks to avoid delays. You must have a strong technical background in semiconductors, experience with advanced process nodes, and proficiency in EDA tools like Synopsys and Cadence, as well as project management tools such as Jira and MS Project. Additionally, knowledge of automotive functional safety standards and hardware emulation platforms is essential for this role at the cutting edge of semiconductor technology.

What you'll do

  • Develop and maintain detailed project plans, milestones, and resource allocation.
  • Identify and resolve bottlenecks and critical path issues proactively.
  • Ensure aligned deliverables across Architecture, RTL, Verification, Physical Design teams.
  • Proactively identify risks and develop mitigation plans to avoid tape-out delays.
  • Hold development teams accountable for scheduled quality deliverables.

What we're looking for

  • 10+ years of experience in the semiconductor industry, with at least 5 years in technical program/project management for ASIC/SoC products.
  • Deep understanding of the full ASIC design flow including RTL, simulation, synthesis, STA, PnR, DFT, and tape-out.
  • Proven experience working with advanced process nodes and high-speed design methodologies.
  • Proficiency in project management tools such as Jira, Confluence, MS Project, and familiarity with EDA tools like Synopsys and Cadence.
  • Experience with complex packaging techniques including 2.5D/3D IC, Si interposers, TSV.
  • Strong ability to influence cross-functional teams without direct authority and manage risks effectively.
  • Knowledge of automotive functional safety standards and requirements.

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