Principal Signal Integrity Engineer (SI/PI)

Amd

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
San Jose, CA
Salary
$232,000–$348,000 / yr
Posted
7 days ago
Freshness
Confirmed live yesterday
Closes
Sep 24, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $202k
This role $290k
$128k most similar roles pay here $372k

This role pays more than 95% of similar roles. Most pay $170,000–$233,050 — the shaded band above. At the midpoint, this role pays about $290k versus about $202k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 374 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 374 roles with salary data.

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At a glance

TL;DR · Principal Signal Integrity Engineer (SI/PI)

As a Principal Signal Integrity Engineer within the Adaptive and Embedded Computing Group, you will lead signal and power integrity development for next-generation FPGA and adaptive computing products. You will drive technical strategy across silicon, package, board, and system-level designs while mentoring junior engineers and making critical design tradeoff decisions. Your daily work involves performing end-to-end channel simulations for high-speed serial interfaces and memory subsystems, including DDR4, DDR5, LPDDR4, LPDDR5, and HBM. You will correlate simulation results with lab measurements to perform root-cause analysis of complex issues. The role requires expertise in electromagnetic theory, transmission lines, and circuit analysis using tools like ADS and HFSS, with additional experience in SIwave or HSPICE. Proficiency in Python, C++, and Matlab is also required to support high-performance computing platforms and power delivery networks.

What you'll do

  • Lead Signal Integrity and Power Integrity development across silicon, package, board, and system levels.
  • Drive system-level SI/PI architecture, design guidelines, and layout recommendations for FPGA and adaptive computing products.
  • Perform end-to-end channel simulations for high-speed serial interfaces and memory subsystems.
  • Analyze and optimize DDR4, DDR5, LPDDR4, LPDDR5, HBM, and other high-performance memory interfaces.
  • Correlate simulation results with lab measurements to perform root-cause analysis of signal and power issues.
  • Evaluate future package and PCB technologies to support next-generation product development.
  • Mentor junior engineers on simulation methodologies, measurement techniques, and debugging processes.

What we're looking for

  • Deep expertise in Signal Integrity with a solid understanding of Power Integrity fundamentals.
  • Experience performing lab measurements and correlating hardware results to simulation models.
  • Proficiency in SI/PI analysis tools such as ADS and HFSS.
  • Experience with high-performance memory interfaces including DDR, LPDDR, and HBM.
  • Experience with PCB, package, and IC-level power delivery networks.
  • Ability to mentor junior engineers and provide technical leadership across organizations.
  • MS or PhD in Electrical Engineering (preferred).
  • Experience with programming in Python, C++, or Matlab (preferred).

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