Principal Quantum Engineer, Application-specific Integrated Circuit (ASIC) Design Lead

Microsoft

Quick summary

Work type: On-site
Location: —
Salary: $163,000–$296,400 / yr
Posted: 72 days ago

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $197k

This role $230k

$130k most similar roles pay here $314k

This role pays more than 82% of similar roles. Most pay $177,250–$216,250 — the shaded band above. At the midpoint, this role pays about $230k versus about $197k for comparable roles.

Based on 240 similar postings.

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About Microsoft

Microsoft Corporation is a global technology leader producing software, hardware, and cloud services including Windows, Office 365, Azure cloud platform, Xbox gaming, and Surface devices. Industry: Software & Cloud Computing

Microsoft currently has 622 open roles on FindRole.

Listed pay typically runs $119,800–$234,700 across 571 roles with salary data.

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TL;DR · Principal Quantum Engineer, Application-specific Integrated Circuit (ASIC) Design Lead

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As a Principal Quantum Engineer – Application-specific Integrated Circuit (ASIC) Design Lead at Microsoft Quantum, you will lead the design of ultra-low-temperature CMOS control ASICs for cryogenic quantum systems and collaborate with device, packaging, and hardware teams to optimize performance. Your day-to-day responsibilities include migrating FPGA-based prototypes into production-grade ASIC implementations, establishing robust verification workflows, and developing layout methodologies that support advanced cryo-CMOS and mixed-signal ASICs. You will work closely with foundry partners to refine PDK features and design rules while guiding the full lifecycle of digital control systems from concept to tape-out. The role requires expertise in EDA software for digital design, verification principles, and low-temperature circuit design, as well as a strong background in logic design and successful ASIC tape-outs in deep sub-micron technologies. This position is ideal for someone with 10+ years of industry experience who can mentor teams on best practices and adapt to the rapidly evolving quantum technology landscape.

Skills

ASIC FPGA RTL UVM Cadence EDA CMOS Cryo-CMOS Python Git CI/CD Linux Verilog VHDL Simulation Debugging Documentation GitHub Tape-out PDK

What you'll do

Lead the design of ultra-low-temperature CMOS control ASICs for cryogenic quantum systems.
Own the architecture and implementation of room-temperature instrumentation logic, including data-acquisition pipelines.
Guide the full lifecycle from concept to tape-out for digital control and mixed-signal systems.
Refine register-transfer level (RTL) designs for FPGA-based prototypes transitioning to production-grade ASICs.
Develop layout methodologies and physical-design flows supporting advanced cryo-CMOS and mixed-signal ASICs.

What we're looking for

Doctorate or Master's degree in Electrical/Computer Engineering, Computer Science, or related field with extensive industry experience.
7+ years of technical engineering experience, including 10+ years delivering complex logic design solutions.
Successful completion of multiple ASIC tape-outs in deep sub-micron technologies.
Proficiency in EDA software for digital design (Cadence suite) and verification principles.
Strong background in debugging designs and simulation environments.
Experience with low-temperature circuit design and quantum physics at cryogenic temperatures is preferred.
Excellent communication skills and ability to mentor teams on best practices.

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