below marketmost similar roles pay hereabove market
This role pays more than
94%
of similar roles. Most pay
$189,737–$250,050
— the blue band above.
At the midpoint, this role pays about
$300k
versus about
$220k
for comparable roles.
Based on 240 similar postings.
Employer
About Nvidia
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has
1623 open roles
on FindRole.
Listed pay typically runs
$184,000–$287,500
across 1110 roles with salary data.
The Principal Chip Lead joins the Silicon Co-Design Group to serve as the technical lead for a consequential silicon program. This role is responsible for the technical integrity of the chip end-to-end, acting as the single point of contact for multi-functional decisions and trade-offs. You will co-lead feature integration from chip to system, resolve complex multi-functional bugs, and steward the qualification playbook. Key responsibilities include guiding mitigations for HBM, power and thermal, high-speed I/O, and packaging issues while shaping the technical narrative for executive leadership. The role requires a BS or MS in Electrical or Computer Engineering and over 15 years of experience in post-silicon bring-up, validation, or system integration. You must demonstrate expertise in SoC and ASIC architecture to solve ambiguous, multi-team failure modes.
Serve as the single technical point of contact for multi-functional decisions, issues, and trade-offs.
Co-lead program-level feature integration from chip to system while resolving inter-function dependencies.
Resolve complex multi-functional bugs by translating ambiguous symptoms into root-cause closures for HBM, power, thermal, and I/O.
Steward the qualification playbook and develop reusable methodologies for other programs.
Shape the technical narrative by presenting key risks and trade-offs as decision-ready options for executive leadership.
Lead the program’s Critical Debug and SCG Technical Execution forums.
Mentor other Chip Leads and contribute to group-wide methodology through post-mortems and technical write-ups.
What we're looking for
BS or MS in Electrical or Computer Engineering, or equivalent experience.
Over 15 years of experience in post-silicon bring-up, validation, or system integration leadership at a major semiconductor company.
Proven track record of working on multiple shipped silicon products.
Strong end-to-end understanding of SoC and ASIC architecture.
Recognized expertise in at least one subsystem such as HBM, SerDes, power and thermal, or packaging.
Experience guiding technical decisions across functional boundaries and translating silicon issues into options for executive audiences.
Prior experience as a Chip Lead, Project Tech Lead, or Principal/Distinguished Engineer on a flagship GPU, AI accelerator, CPU, or networking ASIC (preferred).
Patents, conference papers, invited talks, or recognized contributions to silicon validation, post-silicon debug, or co-design integration (preferred).
GPU
SoC
CPU
Silicon Design
HW-SW co-design
Performance Analysis
Product Binning
Silicon Bringup
Validation
ATE
Data Analysis
Statistics
Process Technologies