Post-Silicon Validation and Methodology Engineer

Nvidia

Confirmed live yesterday High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Santa Clara, CA
Employment
Full-time
Posted
99 days ago
Freshness
Confirmed live yesterday

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Similar $193k
$138k most similar roles pay here $235k

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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1391 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1116 roles with salary data.

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TL;DR · Post-Silicon Validation and Methodology Engineer

The Post-Silicon Validation and Methodology Engineer joins the Silicon Co-Design Group to manage bring-up, validation, qualification, tuning, and productization plans for next-generation silicon across GPU, SoC, and CPU programs. This role involves building test infrastructure, characterization methodologies, and AI-assisted lab workflows to automate telemetry and measurement data evaluation while identifying and redesigning broken processes in bring-up sequencing and regression frameworks. The engineer will lead root-cause analysis on complex hardware and software interaction issues under schedule pressure. Required skills include a degree in Electrical or Computer Engineering, expertise in microarchitecture, timing, clocking, power, and noise, along with proficiency in Python and C/C++. Candidates must demonstrate hands-on lab experience with oscilloscopes and logic analyzers, as well as the ability to use AI tools for automated analysis of bring-up logs and anomaly detection.

What you'll do

  • Manage bring-up, validation, qualification, tuning, and productization plans for next-generation silicon from first power-on to production.
  • Define requirements for power management and clocking features in collaboration with architecture, firmware, and software teams.
  • Build and deploy AI-assisted lab workflows to automate telemetry, measurement data evaluation, and anomaly detection.
  • Develop test infrastructure, characterization methodologies, and bring-up playbooks to shift post-silicon coverage left.
  • Lead root-cause analysis on complex hardware and software interaction issues under tight schedule pressures.
  • Redesign broken processes including bring-up sequencing, debug forums, and regression frameworks to increase team velocity.
  • Develop Python or C++ based lab automation and test infrastructure for use by other specialists.

What we're looking for

  • BS or MS in Electrical or Computer Engineering (or equivalent experience).
  • 5+ years of experience in silicon bring-up, validation, debug, or productization.
  • Deep knowledge of digital development, microarchitecture, timing, clocking, power, noise, and control systems.
  • Proficiency with lab instruments including oscilloscopes, logic analyzers, and power analyzers.
  • Strong programming skills in Python and C/C++ for building lab automation and test infrastructure.
  • Experience using AI tools to accelerate silicon validation, such as automated log analysis or LLM-assisted debug triage.
  • Experience with GPU/SoC architecture (preferred).
  • Experience crafting in-system test and DFT features for production silicon (preferred).

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