Principal Board Package Co-design Architect

Arm Holdings

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Chandler, AZ
Salary
$249,900–$338,100 / yr
Posted
14 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $220k
This role $294k
$134k most similar roles pay here $360k

This role pays more than 90% of similar roles. Most pay $194,782–$245,000 — the shaded band above. At the midpoint, this role pays about $294k versus about $220k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 39 open roles on FindRole.

Listed pay typically runs $208,450–$282,050 across 38 roles with salary data.

Most-posted roles

View all roles at Arm Holdings

At a glance

TL;DR · Principal Board Package Co-design Architect

As a Principal Board - Package co-design Architect, you will join the Packaging, Boards and Multiphysics team to develop physical hardware development platforms based around custom Arm SoC. You will collaborate with global engineering groups to define technical requirements for PCB and silicon package integration, focusing on breakout, routing strategies, design rules, and layer optimization. Your role involves translating technology requirements into platform architectures while evaluating trade-offs between signal integrity, power integrity, and manufacturability. You will utilize Cadence OrCAD and Allegro tools to manage complex LSI devices, including FPGAs and PMICs. The work centers on the embedded compute space, specifically addressing challenges in high-performance systems for Cloud/Edge AI and IoT. Key technical areas include high-speed IO standards like PCIe Gen5/6/7 and LPDDR5/6, as well as advanced PCB fabrication processes such as PTH and HDI.

What you'll do

  • Develop solutions for efficient PCB and silicon package integration to ensure performance and cost-effectiveness.
  • Drive PCB development including breakout, routing strategies, design rules, and layer optimization.
  • Translate technical requirements from SoC teams into viable platform architectures.
  • Influence and drive SoC device pin-outs based on routability, cost optimization, and trade-off analysis.
  • Perform escape routing analysis for high-density SoCs to determine IO counts for specific stack-ups.
  • Conduct Signal and Power Integrity (SI/PI) analysis from both board design and chip packaging perspectives.
  • Assess the manufacturability of advanced PCB technologies in collaboration with fabricators and partners.
  • Define hardware architecture components including component placement, form-factor constraints, and power delivery networks.

What we're looking for

  • Deep technical understanding of SoC architectures for high-performance embedded compute, Cloud/Edge AI, and IoT.
  • Experience with high-speed IO interface standards including PCIe Gen5/6/7, LPDDR5/6, CSI, and DSI.
  • Competence in embedded system board design involving complex LSI devices, FPGAs, firmware, and PMICs.
  • Familiarity with IC packaging technologies and their impact on PCB design for signal routing and power delivery.
  • Experience collaborating with chip packaging teams to influence SoC device pin-outs and trade-off analysis.
  • Expertise in escape routing analysis of high-density SoCs and Signal/Power Integrity (SI/PI) analysis techniques.
  • Knowledge of PCB fabrication processes, including PTH, HDI, stackup topologies, and substrate materials.
  • Proficiency in using EDA tools for schematic entry and PCB layout, specifically Cadence OrCAD and Allegro.

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