below marketmost similar roles pay hereabove market
This role pays more than
85%
of similar roles. Most pay
$176,600–$226,350
— the blue band above.
At the midpoint, this role pays about
$250k
versus about
$201k
for comparable roles.
Based on 240 similar postings.
Employer
About Qualcomm
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has
575 open roles
on FindRole.
Listed pay typically runs
$147,900–$221,900
across 550 roles with salary data.
The Principal Advanced Node Technology Yield & Diagnostics Engineer joins the ASICS Engineering group to drive yield learning and manufacturing success for next-generation AI platforms. This role focuses on advanced-node logic, HBM, chiplet, and 3DIC technologies. The engineer will lead silicon characterization, yield diagnostics, failure analysis, and yield forecasting while translating complex process and manufacturing data into actionable decisions. Key responsibilities include performing process diagnostics across wafer fabrication and final test, driving systematic failure debug using scan diagnosis and metrology, and developing yield models to quantify defect-density impacts. The position requires expertise in lithography, etch, deposition, and CMP processes. Candidates must utilize tools like JMP, Yield Explorer, Python, SQL, and Power BI to identify yield loss mechanisms and optimize product robustness across the entire AI system stack.
Perform process and yield diagnostics for advanced-node digital products across wafer fabrication, sort, and final test.
Lead test-chip characterization and yield learning activities to accelerate technology readiness and product bring-up.
Drive systematic failure debug and root-cause investigations using electrical test data, scan diagnosis, and failure analysis.
Correlate process, product, design, and test data to identify yield loss mechanisms and systematic defects.
Develop and maintain yield models to quantify defect-density impact and process variation sensitivity.
Generate yield forecasts to support technology readiness assessments, manufacturing ramp planning, and business commitments.
Provide early yield and manufacturability insights during product definition to mitigate risks before tapeout.
Utilize statistical analysis and AI/ML-based solutions to identify process-related yield limiters and drive corrective actions.
What we're looking for
M.S. or Ph.D. in Electrical Engineering, Semiconductor Physics, Materials Science, or a related field.
Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
10+ years of experience in advanced-node semiconductor yield engineering, product engineering, process integration, technology development, or yield diagnostics.
Hands-on experience with advanced semiconductor technology nodes (2nm, A14, or equivalent) and yield ramp activities.
Proficiency in data analysis and visualization tools such as JMP, Yield Explorer, Python, SQL, Excel, Power BI, or equivalent.
Experience with Design-for-Yield (DFY) methodologies, including defect-aware design, process variation analysis, redundancy, and repair strategies (preferred).
Data Science
Machine Learning
Big Data
JMP
Semiconductor Manufacturing
FinFET
GAA
Design-for-Test
Failure Analysis
Process Technology
Product Development
Diagnostics
Characterization
Remote (Santa Clara, CA)12 days ago
$232,000–$368,000
Production Testing
ASIC
Microcontrollers
Networking
Servers
PC Reference Validation Platforms
Test Architecture
Failure Diagnosis
Test Plans
System Test
L10
L11