Power Modeling Architect

Amd

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Austin, TXSan Diego, CASanta Clara, CAFt. Collins, COBoston, MA
Salary
$176,560–$264,840 / yr
Posted
29 days ago
Freshness
Confirmed live today
Closes
Sep 28, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $220k
This role $221k
$155k $291k
below market most similar roles pay here above market

This role pays more than 53% of similar roles. Most pay $184,900–$254,750 — the blue band above. At the midpoint, this role pays about $221k versus about $220k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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At a glance

TL;DR · Power Modeling Architect

JOB TITLE: Power Modeling Architect (CPU/GPU Accelerators) As a Power Modeling Architect within the Central Methodology team, you will manage the end-to-end bounding-box lifecycle for high-performance computing components. You will establish power and timing targets while developing decision-grade models for energy-efficient CPU cores, graphics, and machine-intelligence chips. Your daily responsibilities include generating frequency versus power models, providing optimization feedback to IP teams, and developing bottoms-up and top-down estimates for new subsystems. This role requires a Master's or PhD in Electrical Engineering and expertise in VLSI, digital design, and computer architecture. You must demonstrate proficiency in Python, Excel, and silicon test methodologies while navigating wafer fabrication technologies. You will solve complex architectural problems to balance design, frequency, and power across products ranging from low-power APUs to supercomputers.

What you'll do

  • Establish power and timing targets for high-performance CPU, graphics, and machine-intelligence chips.
  • Develop decision-grade models for power and frequency across the entire bounding-box lifecycle.
  • Generate detailed frequency versus power models in collaboration with design, technology, and post-silicon teams.
  • Work with IP and sub-system teams to meet performance and power targets pre- and post-silicon.
  • Provide feedback and direction to IP teams to drive power and timing optimization efforts.
  • Develop bottoms-up estimates and top-down power and frequency targets for new IPs and subsystems.
  • Manage the modeling process from initial concept and feasibility through to production.

What we're looking for

  • Master's or PhD degree in Electrical Engineering or a related field.
  • Strong background in VLSI, digital design, and computer architecture concepts (preferred).
  • Proficiency in Excel and Python with strong data analysis skills (preferred).
  • Familiarity with the balance between design, frequency, and power (preferred).
  • Knowledge of wafer fabrication technologies, libraries, and their respective tradeoffs (preferred).
  • Proficiency in silicon test methodologies (preferred).
  • Experience fostering collaboration with team members within and outside the organization across multiple sites (preferred).

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