ASIC Verification Engineer, Memory Management

Nvidia

Confirmed live today High trust

Quick summary

Work type: On-site
Location: Durham, NCMadison, ALHillsboro, OR
Salary: $100,000–$166,750 / yr
Employment: Full-time
Posted: 10 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $182k

This role $133k

$86k most similar roles pay here $233k

This role pays less than 82% of similar roles. Most pay $149,837–$214,000 — the shaded band above. At the midpoint, this role pays about $133k versus about $182k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1404 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1052 roles with salary data.

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At a glance

TL;DR · ASIC Verification Engineer, Memory Management

Role Posting Log in to save

As an ASIC Verification Engineer, Memory Management - New College Grad 2027, you will join the verification team to verify leading GPUs with a specific focus on the Memory Management unit. Your daily responsibilities include understanding design and implementation, defining verification scope, developing infrastructure such as testbenches, BFMs, checkers, and monitors, and implementing test and coverage plans to ensure design correctness. You will collaborate with architects, designers, and software engineers while working on strategic methodology for advanced testbenches. The role requires proficiency in SystemVerilog, C, and C++, along with knowledge of constrained random testing, functional coverage, assertion-based verification, and object-oriented programming. You will utilize tools like VCS, IES, Debussy, and GDB. Preferred skills include UVM, Perl, Python, and experience with memory subsystem micro-architecture, cache topologies, and arbiter designs.

Skills

SystemVerilog UVM C C++ Python Perl ASIC Design Verification Methodology Constrained Random Testing Assertion-Based Verification VCS IES GDB Debussy Memory Management Computer Architecture Testbenches Coverage Closure

What you'll do

Understand the design and implementation of the Memory Management unit.
Define the scope for verification activities.
Develop verification infrastructure including testbenches, BFMs, checkers, and monitors.
Implement comprehensive test and coverage plans.
Verify the functional correctness of the GPU design.
Determine the strategic direction for advanced testbench methodologies.
Perform constrained random testing with functional coverage and assertion-based verification.

What we're looking for

Pursuing or recently completed a BS or MS in Electrical Engineering, Computer Science, Computer Engineering, or a related field.
Required exposure to computer architecture, ASIC design, and verification methodology.
Strong proficiency with SystemVerilog, C and/or C++, test planning, coverage closure, and creating reusable verification components.
Knowledge of constrained random testing with functional coverage and assertion-based verification.
Understanding of object-oriented programming concepts.
Exposure to simulation tools like VCS and IES, and debug tools like Debussy or GDB.
Good debugging and problem-solving skills.
Understanding of memory subsystems, cache topologies, UVM, and Perl or Python knowledge (preferred).

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