IC Package Design Technical Leader

Cisco

Remote Actively hiring
San Jose, USA · Remote Posted 25 days ago $210,600–$305,100 / year
View original post Log in to save

At a glance

AI generated

TL;DR

Join the Common Hardware Group (CHG) as a senior technical leader in package design for Cisco’s Silicon One initiative, where you will drive complex package design programs from concept to implementation, optimizing pinouts and high-speed routing while collaborating with silicon architecture teams. You’ll lead and mentor the San Jose team, enhancing methodologies and fostering cross-functional collaboration across global engineering groups. This role requires extensive experience in high-speed package design, EDA tools, and technical leadership in hardware development, along with preferred skills like scripting languages and knowledge of testing equipment. Your work will impact the future of networking innovation by delivering robust solutions for Cisco’s core products on a global scale.

Skills

Python Perl TCL shell EDA tools ASIC package design signal integrity power distribution networks SI/PI teams high-speed routing package layout cross-functional collaboration scripting languages VNA analyzers oscilloscopes

What you'll do

  • Lead complex package design programs from concept to implementation.
  • Optimize package pinouts and high-speed routing for performance and reliability.
  • Collaborate with silicon architecture teams to ensure system-level alignment.
  • Mentor engineers and develop future package leads within the San Jose team.
  • Enhance package design methodologies and improve development flows continuously.

What we're looking for

  • Bachelor’s degree in electrical engineering or related field with 12+ years of experience, or Master’s degree with 8+ years.
  • Extensive experience in high-speed package design and signal integrity considerations.
  • Proficiency with industry-standard EDA tools for package layout and design.
  • Technical leadership in complex hardware or silicon development programs.
  • Experience leading engineering teams and developing technical talent.

Market check

Salary context

This $210,600–$305,100 range sits above 90% of similar postings on FindRole.

Peer median band

$152,450–$241,200

Median floor and ceiling across peers.

Typical midpoint (25–75%)

$162,000–$223,700

Middle half of comparable postings.

Based on 240 comparable postings.

* 240 is the maximum number of comparable postings sampled.

Employer

About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 103 open roles on FindRole.

Listed pay typically runs $165,000–$241,400 across 103 roles with salary data.

Most-posted roles

View all roles at Cisco

More like this

Similar roles

Hardware Engineering Technical Leader

Cisco

Remote (Usa-San Jose, US) 11 days ago $168,800–$241,200
FPGA Xilinx Altera Microchip Lattice UVM ASIC DFT Signal_Integrity Python PostgreSQL CI/CD AWS Kubernetes Git Schematics Layout Troubleshooting High_Speed_Board_Design Ethernet Wireless_Protocol PoE_PSE_PD Gigabit_Ethernet Multigigabit_Ethernet 10_Gigabit_Ethernet 25G_Ethernet 100G_Ethernet 400G_Ethernet 800G_Ethernet
Remote

IC Package Design Engineer

Qualcomm

San Diego, Ca,Us, US 35 days ago $108,400–$162,600
Cadence Allegro XtractIM PowerSI HFSS Q3D Calibre Virtuoso PCB Editor Advanced Package Designer APD/SiP Design Rules Check SI/PI tools 2.5D Si-Bridge DDR PCIe UCIE

Principal IC Packaging Engineer

Qualcomm

San Diego, Ca,Us, US 140 days ago $201,600–$302,400
RDL Wafer Bonding Flip Chip Wire Bond SiP Materials Science Equipment Expertise High-Density Interconnect Design Reliability Standards Test Methods Qualification Procedures Failure Analysis Techniques Substrate Manufacturing Processes Design Rules Technical Project Management Cross-Functional Team Leadership

Staff IC Packaging Engineer

Qualcomm

San Diego, Ca,Us, US 17 days ago $154,000–$231,000
FCCSP FCBGA SiP/Modules RDL-based packages 2.5D/3D integration Design of Experiments Best Known Methods Process Control Plans DFM FMEA SPC/QC Reliability Testing Failure Analysis Flip Chip Wire Bond Substrate Technologies Wafer-Level Processes Laser Groove Technology Six Sigma

IC Package/System Design solution Engineer, Staff

Qualcomm

San Diego, Ca,Us, US 95 days ago $154,000–$231,000
ORCAD Allegro Valor ravel Python PERL TCL PCIe DDR Ethernet SerDes I2C I3C SPI MDIO SIPI PDN PMIC RF前端设计 内存技术 高速信号完整性分析 热管理 合规性测试

Physical IC Design Engineer

Broadcom

Usa-Ca San Jose Innovation Drive, US 32 days ago $120,000–$192,000
TCL PERL EDA Tools RTL Timing Closure EM/IR Analysis Place and Route Clock Tree Synthesis Floor-planning Layout Flow and Methodology Development