Logic Library Development Lead

Apple Inc

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Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$184,700–$324,800 / yr
Posted
48 days ago
Freshness
Confirmed live today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $196k
This role $255k
$123k $346k
below market most similar roles pay here above market

This role pays more than 88% of similar roles. Most pay $165,250–$227,300 — the blue band above. At the midpoint, this role pays about $255k versus about $196k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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At a glance

TL;DR · Logic Library Development Lead

The Logic Library Development Lead joins the custom digital circuits team to lead library development for Apple products. This role involves driving internal AI based library development requirements and coordinating with internal design teams, CAD, foundry, and tool vendors. Key responsibilities include leading library characterization, modeling, genAI, and QA activities while enabling new technology requirements in logic library development flows. The position requires expertise in timing, power, CCS noise, and variation modeling using Liberty formats and Spice simulation. Candidates must utilize Python, TCL, and Perl for data analysis and ML to study trends in big datasets. Technical skills include Verilog, VHDL, and various EDA tools for synthesis, place-route, and formal verification within deep submicron technologies and standard cell library designs.

What you'll do

  • Drive internal AI-based library development requirements.
  • Define logic library requirements with internal design teams, CAD vendors, and foundries.
  • Integrate new technology requirements into logic library development flows.
  • Lead library characterization, modeling, genAI, and QA activities.
  • Perform data analysis and ML to study trends and perform QA on large datasets.
  • Manage timing, power, and noise modeling for large custom macros and complex sequential flops.
  • Oversee implementation specifications, design flows, and flow automation.

What we're looking for

  • BS degree in a relevant field.
  • Minimum of 10 years of relevant industry experience.
  • Proven track record of leading highly competitive teams and delivering on time (preferred).
  • Background in Library Characterization, Timing/Power/CCS Noise/Variation Modeling, Liberty Formats, Spice simulation, and Static Timing and Power Analysis flows (preferred).
  • Knowledge of timing modeling of large custom macros and complex sequential flops (preferred).
  • Exposure to Design For Test, scan concept, and writing DFT friendly RTL (preferred).
  • Knowledge of FE modeling/Verilog and/or VHDL and experience with various EDA tools (preferred).

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