Lead Memory Controller Micro-Architect

Samsung Electronics

Remote

Quick summary

Work type
Remote
Location
Austin, TX
Salary
$221,700–$364,800 / yr
Posted
51 days ago
Closes
Jul 31, 2026

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $204k
This role $293k
$139k most similar roles pay here $389k

This role pays more than 97% of similar roles. Most pay $177,250–$231,737 — the shaded band above. At the midpoint, this role pays about $293k versus about $204k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Electronics

Samsung Electronics is a South Korean multinational corporation and a global leader in technology, specializing in consumer electronics, semiconductors, and home appliances.

Samsung Electronics currently has 39 open roles on FindRole.

Listed pay typically runs $175,000–$225,000 across 37 roles with salary data.

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View all roles at Samsung Electronics

At a glance

TL;DR · Lead Memory Controller Micro-Architect

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As a Lead Memory Controller Micro-Architect at Samsung, you will lead the design and development of advanced memory controllers for LPDDR5, LPDDR6, PIM, DDR5, GDDR7, and HBM4 technologies within the System IP team. Your daily responsibilities include overseeing the entire microarchitecture from RTL design to performance optimization, collaborating with cross-functional teams to ensure adherence to JEDEC standards, and driving high-quality RTL development while meeting strict PPA goals. You will leverage deep expertise in memory technologies, Verilog, and ASIC design flows, along with scripting languages like Perl and Python for automation. This role demands strong communication skills and the ability to navigate a fast-paced global environment, contributing to Samsung's leadership in cutting-edge memory technology solutions.

Skills

Verilog RTL design ASIC design flow Python Perl JEDEC standards DDR PHY AMBA AXI ACE AES ECC RAS LINT CDC ECO flows power analysis

What you'll do

  • Lead the design and development of advanced memory controllers for Samsung.
  • Own and influence the entire memory controller microarchitecture from concept to RTL.
  • Drive micro-architecture, RTL design, debug, and timing closure for custom memory controllers.
  • Ensure design quality through methodologies like LINT, CDC, ECO flows, and power analysis.
  • Collaborate with cross-functional teams to achieve PPA goals and resolve implementation challenges.
  • Apply knowledge of DDR PHY to ensure timely and accurate SOC IP delivery.

What we're looking for

  • Over 20 years of experience in memory controller micro-architecture with a relevant degree.
  • Expertise in multiple memory technologies including LPDDR5/6, PIM, DDR, GDDR, and HBM.
  • Strong knowledge of JEDEC standards and familiarity with DDR PHY.
  • Proven success in driving architecture through RTL design for high-performance digital systems.
  • Deep expertise in Verilog and ASIC design flow, including verification and timing analysis.
  • Proficiency in scripting languages like Perl or Python for design automation.
  • Excellent communication skills to collaborate effectively in a fast-paced global environment.

Related searches

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