Lead Diagnostics Software Engineer, ATE Integration

Amd

Confirmed live today High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Austin, TX
Salary
$174,400–$261,600 / yr
Posted
153 days ago
Freshness
Confirmed live today
Closes
May 27, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $183k
This role $218k
$132k $275k
below market most similar roles pay here above market

This role pays more than 78% of similar roles. Most pay $151,643–$215,312 — the blue band above. At the midpoint, this role pays about $218k versus about $183k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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View all roles at Amd

At a glance

TL;DR · Lead Diagnostics Software Engineer, ATE Integration

Lead Diagnostics Software Engineer, ATE Integration joins the team to drive the migration of post-silicon software validation frameworks and System-Level Tests directly into Automated Test Equipment and Wafer Sort environments. The role involves designing architectures, tooling, and translation methodologies to convert complex software-driven GFX and compute test cases into production-grade ATE patterns. Key responsibilities include defining technical roadmaps, developing software utilities for cycle-accurate vector formats like STIL or WGL, and analyzing hardware-software dependencies for deterministic modeling. The position requires proficiency in C/C++, Python, and experience with V93000 or UltraFLEX platforms. The work addresses the technical challenges of high-volume manufacturing for data center GPU IPs, focusing on massively parallel compute pipelines, high-bandwidth memory controllers, and multi-die chiplet interconnect protocols like UCIe.

What you'll do

  • Define the technical roadmap and architecture for migrating post-silicon SLT and GFX diagnostics onto wafer sort and ATE hardware.
  • Develop software utilities and pipelines to convert functional diagnostic sequences into cycle-accurate vector formats for ATE testers.
  • Analyze hardware-software dependencies to build deterministic models that emulate host behaviors on ATE hardware.
  • Optimize tester execution times to reduce costs while maximizing structural and functional test coverage for data center GPU IPs.
  • Design and implement diagnostic test cases to identify silicon issues early in the production lifecycle.
  • Serve as the primary technical liaison between GFX/Compute Diagnostics, Product/Test Engineering, and Design-for-Test teams.

What we're looking for

  • Bachelor’s, Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
  • Proven industry experience in silicon engineering spanning post-silicon validation, product engineering, diagnostics development, or structural/functional test generation (preferred).
  • Strong programming background in C/C++ and Python with understanding of bare-metal or driver-level programming (preferred).
  • Hands-on experience with production-grade Automated Test Equipment platforms like V93000 or UltraFLEX (preferred).
  • Expert understanding of structural pattern generation, vector timing, clock domains, and diagnostic patterns (preferred).
  • Familiarity with high-volume manufacturing challenges for data center architectures, including HBM integration and chiplet interconnect protocols (preferred).
  • Deep understanding of GFX and compute architectures with the ability to design diagnostic and test cases (preferred).
  • Experience with DevOps environments like GitHub and CI/CD pipelines (preferred).

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