HW Security Design Engineer

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $164,000–$246,000 / yr
Posted: 113 days ago
Freshness: Confirmed live yesterday
Closes: Nov 17, 2026
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $182k

This role $205k

$116k most similar roles pay here $260k

This role pays more than 71% of similar roles. Most pay $151,206–$213,093 — the shaded band above. At the midpoint, this role pays about $205k versus about $182k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

Most-posted roles

View all roles at Qualcomm

At a glance

TL;DR · HW Security Design Engineer

Role Posting Log in to save

As a member of the uArchitecture/Design team, the HW Security Design Engineer will comprehend, interpret, and implement architectures and designs for multiple QCOM IPs based on high-level specifications. The role involves defining micro-architectures to meet specific requirements, creating detailed technical documentation for design and verification teams, and performing implementation through coding when necessary. Key responsibilities include following IP updates and chip schedules to manage effort planning effectively. Candidates must possess experience in digital logic design, uArchitecture definition, and VLSI/ASIC design. Technical requirements include familiarity with AHB, AXI, or APB protocols, as well as knowledge of AES/SHA algorithms, key handling principles, and high-throughput architectures for cryptographic processing. The role focuses on the development of internal security IPs to solve complex hardware security challenges within a tightly integrated chip production environment.

Skills

ASIC VLSI Digital Logic Design Micro-architecture AHB AXI APB AES SHA Cryptographic Processing FIPS Common Criteria

What you'll do

Interpret high-level specifications for internal Qualcomm security IPs.
Define and describe micro-architectures to meet specific technical requirements.
Create detailed micro-architecture documents for design and verification teams.
Vet document quality and usability with design and DV representatives.
Implement hardware designs and code directly when necessary.
Perform effort planning based on IP updates and chip schedules.

What we're looking for

A Bachelor's degree in Science, Engineering, or a related field is required with 6+ years of ASIC design experience.
A Master's degree in Science, Engineering, or a related field is required with 5+ years of ASIC design experience.
A PhD in Science, Engineering, or a related field is required with 4+ years of ASIC design experience.
Candidates must have 10+ years of experience with digital logic design and micro-architecture definition.
Hands-on experience with VLSI/ASIC design and implementation is required.
Familiarity with AHB, AXI, or APB protocols is required.
Experience in technical document creation and maintenance for digital designs is required.
Preferred knowledge includes AES/SHA algorithms, FIPS/Common Criteria certification, and high-throughput cryptographic processing architectures.

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