HW Security Design Engineer

Qualcomm

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$164,000–$246,000 / yr
Posted
159 days ago
Freshness
Confirmed live today
Closes
Nov 17, 2026
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $182k
This role $205k
$131k $258k
below market most similar roles pay here above market

This role pays more than 68% of similar roles. Most pay $146,975–$216,065 — the blue band above. At the midpoint, this role pays about $205k versus about $182k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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View all roles at Qualcomm

At a glance

TL;DR · HW Security Design Engineer

Role Posting Log in to save

As a HW Security Design Engineer within the uArchitecture/Design team, you will comprehend, interpret, and implement architectures and designs for multiple internal security IPs based on high-level specifications. Your daily responsibilities include defining micro-architectures, creating detailed technical documentation for design and verification teams, and performing effort planning to meet chip schedules. You will be expected to implement designs and code when necessary. The role requires expertise in digital logic design, uArchitecture definition, and VLSI/ASIC implementation. You must be familiar with AHB, AXI, and APB protocols. Preferred skills include knowledge of AES/SHA algorithms, key handling principles, FIPS or Common Criteria certification, and high-throughput architectures for cryptographic processing. This position focuses on developing secure hardware components for integrated chip production.

Skills

ASIC Design VLSI uArchitecture AHB AXI APB AES SHA Digital Logic Design Cryptographic Processing FIPS Common Criteria Micro-architecture

What you'll do

  • Interpret high-level specifications for internal Qualcomm security IPs.
  • Define and describe micro-architectures to meet high-level specifications.
  • Produce detailed micro-architecture documents according to a defined schedule.
  • Vet document quality and usability with design and verification representatives.
  • Implement design code directly when required by the project.
  • Perform effort planning based on IP updates and chip schedules.

What we're looking for

  • Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
  • PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
  • 10+ years of experience with digital logic design and uArchitecture definition.
  • Hands-on experience with VLSI/ASIC design and implementation.
  • Familiarity with AHB, AXI, or APB protocols.
  • Experience with technical document creation and maintenance for digital designs.
  • In-depth knowledge of AES/SHA algorithms, FIPS/Common Criteria certification, or high-throughput cryptographic architectures (preferred).

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