Graphics FE Integration Engineer

Apple Inc

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Work type: On-site
Location: Austin, TX
Posted: 15 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

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Similar $197k

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

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At a glance

TL;DR · Graphics FE Integration Engineer

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As a Graphics FE Integration Engineer within the Silicon Technologies group, you will join the GPU FE Design integration team to develop high-performance, power-efficient GPU technology. Your primary responsibilities involve creating GPU RTL by integrating various IPs while adhering to architectural parameters, physical constraints, DFT logic, and power intent. You will perform RTL integration, partitioning, design analysis, qualification, packaging, and delivery, while also running logic equivalence checking between designs. To ensure implementation readiness, you will utilize RTL linting, custom checks, and unit level synthesis. The role requires proficiency in Verilog, SystemVerilog, and scripting languages such as Perl, Ruby, or Python. You will solve complex problems across technical domains including PPA optimization, codeline management, and micro-architecture for GPU, CPU, and SIMD systems to improve front-end design integration processes.

Skills

Verilog System Verilog Python Perl Ruby RTL DFT LEC Lint Synthesis PPA Optimization Invio Genus SIMD Architecture Logic Design

What you'll do

Create GPU RTL by integrating various IPs according to architectural parameters and physical constraints.
Perform RTL integration, partitioning, design analysis, qualification, packaging, and delivery.
Execute logic equivalence checking between designs to ensure integrity.
Verify implementation readiness through RTL linting, custom checks, and unit level synthesis.
Develop innovative methods to improve the front-end design integration process.
Contribute to technical specifications for individual design units.
Debug and resolve complex design integration issues across multiple technical domains.

What we're looking for

Bachelor of Science degree and 3 years of relevant experience.
Experience with Verilog or SystemVerilog.
Experience with at least one scripting language: Perl, Ruby, or Python.
Knowledge of PPA optimization techniques and implementation flows (preferred).
Experience with scalable designs, DFT insertion, LEC, Lint, and codeline management (preferred).
Proficiency in logic design principles and programming techniques (preferred).
Experience with RTL analysis/PPA optimization using Invio, LEC, and Genus (preferred).
Familiarity with GPU/CPU/SIMD architecture and micro-architecture (preferred).

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