GPU Implementation Engineer(Austin & San Diego)

Qualcomm

Quick summary

Work type: On-site
Location: Austin, TXCalifornia
Salary: $161,800–$242,600 / yr
Posted: 66 days ago
Closes: Oct 6, 2026
Nearby: 99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $204k

This role $202k

$152k most similar roles pay here $252k

This role pays less than 51% of similar roles. Most pay $172,000–$235,750 — the shaded band above. At the midpoint, this role pays about $202k versus about $204k for comparable roles.

Based on 240 similar postings.

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About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 750 open roles on FindRole.

Listed pay typically runs $154,000–$231,000 across 430 roles with salary data.

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At a glance

TL;DR · GPU Implementation Engineer(Austin & San Diego)

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The Design Implementation Engineer role at Qualcomm's Adreno GPU team involves managing frontend implementation design challenges and collaborating closely with microarchitecture and physical design teams to achieve aggressive Power, Performance, and Area (PPA) targets for state-of-the-art GPU cores. The candidate will integrate and implement designs using industry-standard EDA tools such as Design Compiler, Fusion Compiler, Genus, Innovus, Conformal LEC, Formality, and PrimeTime, while also generating power vectors and analyzing power consumption. Essential skills include digital design, RTL synthesis, scripting with Tcl or Python, and strong analytical and communication abilities. Preferred qualifications include knowledge of UPF, advanced process nodes like 3 nm, GPU microarchitecture, and experience leading high-performance teams to meet PPA targets. The role requires a Bachelor’s degree in Electrical/Computer Engineering or related field with at least 7 years of direct frontend implementation and physical design work experience.

Skills

Design Compiler Fusion Compiler Genus Innovus Conformal LEC Formality PrimeTime Tcl Python UPF GPU microarchitecture EDA tools Power vector generation Power analysis Synthesis and place-and-route tools Advanced process nodes

What you'll do

Manage frontend implementation design challenges for state-of-the-art GPU cores.
Integrate and implement advanced GPU cores to meet aggressive PPA targets.
Collaborate with microarchitecture and physical design teams on complex projects.
Utilize EDA tools like Design Compiler, Innovus, and PrimeTime for efficient design.
Generate power vectors and conduct power analysis to optimize core performance.

What we're looking for

Extensive experience in frontend implementation and physical design for ASICs.
Proficiency with EDA tools including Design Compiler, Innovus, PrimeTime, etc.
Expertise in RTL synthesis and power vector generation/analysis.
Strong scripting skills using Tcl or Python for automation.
Bachelor’s degree in Electrical/Computer Engineering plus 7+ years of relevant experience.

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