FPGA Hardware Engineer

Qualcomm

Quick summary

Work type
On-site
Location
San Diego, CA · Boulder, CO
Salary
$121,400–$202,200 / yr
Posted
11 days ago
Closes
Nov 22, 2026

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $184k
This role $162k
$110k most similar roles pay here $231k

This role pays less than 74% of similar roles. Most pay $160,000–$208,900 — the shaded band above. At the midpoint, this role pays about $162k versus about $184k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 558 open roles on FindRole.

Listed pay typically runs $154,000–$231,000 across 401 roles with salary data.

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View all roles at Qualcomm

At a glance

TL;DR · FPGA Hardware Engineer

As a Hardware Engineer at Qualcomm Technologies, Inc., you will join a dynamic cross-disciplinary team to support government-sponsored projects by adapting and extending commercial systems for novel applications. Your daily responsibilities include designing, developing, testing, automating, and documenting communication capabilities, with a focus on FPGA design, embedded system architecture, and DSP implementations for real-time systems. You will leverage System Verilog RTL design, Xilinx FPGA architectures, and digital signal processing concepts to create robust solutions, using tools like Modelsim, VCS, and Xcelium for simulation and validation. Proficiency in Python, Tcl, Git, and Gerrit is essential, along with a strong understanding of communication protocols such as AXI4-x and PCIe. This role requires a deep technical background and the ability to work collaboratively on complex projects that demand precision and quality.

What you'll do

  • Design and develop FPGA-based systems for real-time embedded applications.
  • Implement and verify digital signal processing algorithms using System Verilog.
  • Customize and debug make-based build flows using Xilinx’s Vivado tools.
  • Conduct static timing analysis and ensure timing closure in FPGA designs.
  • Develop and document communication protocols such as AXI4-x, DDRx, PCIe.
  • Script automation tasks with Python or Tcl for efficient workflow management.
  • Collaborate on validation methodologies and UVM-based verification flows.

What we're looking for

  • U.S. Government security clearance required
  • 8+ years experience in FPGA design and embedded system architecture
  • Expertise in System Verilog RTL design for both design and verification
  • Deep understanding of Xilinx FPGA architectures and digital signal processing concepts
  • Proficiency with design simulation tools like Modelsim, VCS, or Xcelium
  • Experience customizing make-based build flows and working with Xilinx’s Vivado tools

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