Firmware Architect & Subsystem Technical Leader

Cisco

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Maynard, MA
Salary
$192,400–$275,800 / yr
Employment
Full-time
Posted
6 days ago
Freshness
Confirmed live today
Closes
Nov 30, 2026

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $223k
This role $234k
$154k $289k
below market most similar roles pay here above market

This role pays more than 61% of similar roles. Most pay $191,968–$254,750 — the blue band above. At the midpoint, this role pays about $234k versus about $223k for comparable roles.

Based on 240 similar postings.

Employer

About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 307 open roles on FindRole.

Listed pay typically runs $167,700–$245,000 across 224 roles with salary data.

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At a glance

TL;DR · Firmware Architect & Subsystem Technical Leader

JOB TITLE: Firmware Architect & Subsystem Technical Leader, Acacia As an Embedded Software Engineering Technical Leader within the Acacia team, you will serve as a principal firmware architect guiding the embedded CPU software architecture. You will lead the end-to-end design and implementation of high-reliability, low-latency firmware for multi-core microcontrollers, specifically ARM Cortex-R and Cortex-M cores. Your daily responsibilities include architecting multi-threaded control-plane firmware, Board Support Packages, device drivers, and real-time state machines on bare-metal and RTOS platforms like VxWorks, FreeRTOS, or ThreadX. You will utilize C and C++ to resolve hardware-software boundary challenges and configure complex optical subsystems. This role addresses technical challenges in high-speed coherent optical transceivers and pluggable optical interconnects, specifically focusing on PAM4 DSP architectures and high-performance compute clusters for artificial intelligence and machine learning workloads.

What you'll do

  • Lead the end-to-end architecture, design, and implementation of high-reliability, low-latency embedded firmware for multi-core microcontrollers.
  • Partner with ASIC, DSP, Optical, and Hardware architects to co-design hardware/software interfaces and resolve boundary challenges.
  • Architect multi-threaded control-plane firmware, Board Support Packages (BSPs), device drivers, and real-time state machines.
  • Establish firmware engineering standards and mentor senior and intermediate engineers across the software organization.
  • Drive multi-functional alignment from high-level system modeling down to low-level register and bit-level implementation.
  • Provide technical direction and leadership to scale the engineering presence within the community.

What we're looking for

  • Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or a related field.
  • 12+ years of professional experience in low-level embedded C and C++ programming for resource-constrained hardware.
  • 8+ years of experience architecting and developing real-time embedded firmware on bare-metal systems and RTOS platforms.
  • Experience crafting firmware for ARM processors, including BSPs, device drivers, and hardware peripheral interfaces like I2C, SPI, and UART.
  • Ability to work 100% onsite in Maynard, MA during the initial one-year onboarding period.
  • Firmware architecture for optical transceivers, high-speed mixed-signal ICs, photonics, or telecommunications hardware (preferred).
  • Development of control-plane software, state machines, and multi-processor/multithreaded communication protocols (preferred).
  • Proficiency with modern version control, CI/CD tools, and automation scripting such as Git, Jira, and Python (preferred).

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