High-Speed SerDes Design Engineer

Cisco

Confirmed live yesterday High trust

Hybrid

Quick summary

Work type: Hybrid
Location: San Jose, CA
Salary: $171,600–$245,000 / yr
Employment: Full-time
Posted: 44 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $196k

This role $208k

$139k $257k

below market most similar roles pay here above market

This role pays more than 55% of similar roles. Most pay $162,000–$229,612 — the blue band above. At the midpoint, this role pays about $208k versus about $196k for comparable roles.

Based on 240 similar postings.

Employer

About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 261 open roles on FindRole.

Listed pay typically runs $167,700–$245,000 across 197 roles with salary data.

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At a glance

TL;DR · High-Speed SerDes Design Engineer

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The High-Speed SerDes Design Engineer joins the Acacia team to develop intelligent transceivers for the 100G, 400G, 800G, and 1.6T+ bit speed fiber optic transmission market. Working within a small mixed-signal IC design group, you will architect, design, layout, measure, and productize ultra-deep sub-micron-based CMOS products for data center, metro, and long-haul telecommunication networks. Key responsibilities include leading large block designs on complex chips, mentoring team members, and ensuring signal and power integrity specifications are met. You will utilize technologies including FinFET and GAA, and tools such as Cadence Virtuoso, Spectre, Calibre, and Matlab. Required expertise covers high-speed serial links, serializers, deserializers, phase-locked loops, and programmable gain amplifiers to solve complex analog design problems from conception through production.

Skills

CMOS FinFET GAA Cadence (Virtuoso Spectre SpectreX Calibre Matlab AMS Power Integrity High Speed Serial Links OpAmps Electromigration Analysis IR Drop Analysis

What you'll do

Architect, design, layout, measure, and productize ultra-deep sub-micron-based CMOS products.
Lead design efforts for large blocks on complex chips and track project deliverables.
Provide solid design methodology from initial conception through to production.
Perform peer reviews of complex IC designs to ensure technical accuracy.
Mentor team members and provide technical guidance on mixed-signal design.
Collaborate with packaging and hardware teams to meet signal and power integrity specifications.
Conduct laboratory validation including ESD practices and the construction of test setups.
Perform design for manufacturability including PVT characterization, electromigration, and IR drop analysis.

What we're looking for

Bachelor's degree plus 8 years of related experience, Master's plus 6 years, or PhD plus 3 years of related experience.
Experience in design, simulation, and measurement of high-speed ICs in at least 3 specified areas including serial links, drivers, or PLLs.
Experience with electrical transceiver applications including backplane and cable communications (preferred).
Experience in FinFET and GAA technologies (preferred).
High-frequency layout experience including floorplaning, passives components, and signal routing (preferred).
Experience in design for manufacturability including characterization over PVT, electromigration, self-heating, and IR drop analysis (preferred).
Experience in laboratory validation including ESD practices and construction of test setups (preferred).
Experience in design software including Cadence Virtuoso, Spectre, Calibre, EMX, AMS, and Matlab (preferred).

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