below marketmost similar roles pay hereabove market
This role pays less than
68%
of similar roles. Most pay
$172,125–$219,500
— the blue band above.
At the midpoint, this role pays about
$182k
versus about
$196k
for comparable roles.
Based on 240 similar postings.
Employer
About Qualcomm
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has
575 open roles
on FindRole.
Listed pay typically runs
$147,900–$221,900
across 550 roles with salary data.
The EDA/CAD Software Engineer, Staff joins the Global CAD team within the ASICS Engineering group to develop critical tools, flows, and methodologies for VLSI design. This role focuses on building emulation CAD algorithms to address specific SoC needs, including synthesis, partitioning, place and route, and clock optimization. The engineer will drive compute and storage optimization while mentoring and leading other team members. Key responsibilities involve developing customer-facing applications using software design principles, data structures, and algorithms. Required technical skills include C++ software development, Linux, and experience with RTL Synthesis, Clock Tree Optimization, and logic design. The position utilizes industry-standard technologies such as Git, LSF, JIRA, and GCC to solve complex infrastructure and hardware design problems within the VLSI and ASIC design domains.
Develop critical emulation CAD algorithms for synthesis, partitioning, place and route, and clock optimization.
Create solutions for infrastructure needs using industry-standard tools and technologies.
Drive compute and storage optimization for CAD tools.
Mentor and lead other members of the engineering team.
Develop customer-facing applications based on software design principles and patterns.
Implement data structures and algorithms to support VLSI design flows.
What we're looking for
Bachelor's degree in Science, Engineering, or related field and 7+ years of related work experience.
Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Master's or PhD in Computer Science, Computer Engineering (preferred).
2+ years of ASIC design, FPGA design, verification, or related work experience (preferred).
2+ years of C++ SW development, CAD tool development, or related work experience (preferred).
2+ years of hands-on experience with Linux (preferred).
C++
Linux
System Verilog
RTL Synthesis
Clock Tree Optimization
Data Structures
Algorithms
Design Patterns
Git
LSF
JIRA
GCC
VLSI Design
FPGA Design
CAD Tool Development
Java
Object-Oriented Programming
Git
Jira
Linux
Generative AI
Multi-threading
Data Structures
Performance Testing
Source Code Management
Embedded Systems
UI/UX Design