EDA/CAD SW Engineer

Qualcomm

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$145,600–$218,400 / yr
Posted
40 days ago
Freshness
Confirmed live today
Closes
Mar 16, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $190k
This role $182k
$135k $240k
below market most similar roles pay here above market

This role pays less than 56% of similar roles. Most pay $156,787–$223,250 — the blue band above. At the midpoint, this role pays about $182k versus about $190k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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View all roles at Qualcomm

At a glance

TL;DR · EDA/CAD SW Engineer

The EDA/CAD SW Engineer joins the Global CAD team within the ASICS Engineering group to develop critical tools, flows, and methodologies for various aspects of VLSI design. The role focuses on building emulation CAD algorithms to address specific SoC needs, including synthesis, partitioning, place and route, and clock optimization. Key responsibilities involve driving compute and storage optimization, mentoring team members, and developing customer-facing applications. Candidates must utilize C++, Linux, and industry-standard tools like Git, LSF, JIRA, and GCC. The position requires expertise in data structures, algorithms, and design patterns, alongside specific knowledge of RTL Synthesis, Clock Tree Optimization, and logic design. This role solves complex technical problems in the emulation space to support the development of advanced integrated circuits.

What you'll do

  • Develop critical emulation CAD algorithms for synthesis, partitioning, place and route, and clock optimization.
  • Develop solutions for infrastructure needs using industry-standard tools and technologies.
  • Drive compute and storage optimization for CAD tools.
  • Create customer-facing applications for the engineering group.
  • Mentor and lead other members of the CAD engineering team.
  • Implement software design principles, patterns, and data structures in C++.

What we're looking for

  • Bachelor's degree in Science, Engineering, or a related field.
  • Master's or PhD in Computer Science or Computer Engineering (preferred).
  • 2+ years of experience in ASIC design, FPGA design, verification, or related work.
  • 2+ years of C++ SW development, CAD tool development, or related work experience.
  • 2+ years of hands-on experience with Linux.
  • 2+ years of direct hands-on experience with CAD SW development and software design principles.
  • Demonstratable knowledge of data structures, algorithms, and design patterns.
  • Experience in RTL Synthesis, Clock Tree Optimization, VLSI design concepts, and logic design.

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