Director, Design Verification

Samsung Semiconductor

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$219,000–$351,000 / yr
Posted
today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $222k
This role $285k
$148k most similar roles pay here $373k

This role pays more than 84% of similar roles. Most pay $184,900–$258,250 — the shaded band above. At the midpoint, this role pays about $285k versus about $222k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 54 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 54 roles with salary data.

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At a glance

TL;DR · Director, Design Verification

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As the Director of Design Verification at Samsung’s DRAM Development Lab in San Jose, you will lead a team responsible for enhancing memory and storage capabilities through silicon solutions like custom HBM base dies and AI accelerators. Your role involves defining and implementing SoC verification strategies, managing resources across multiple concurrent projects, and collaborating with architecture, design, firmware, and validation teams to ensure successful first-pass silicon outcomes. You must have extensive experience in ASIC verification, leadership in verification team management, and expertise in UVM, C++, SystemVerilog, and verification tools. This role demands a deep understanding of complex project schedules and risk mitigation strategies within the context of developing cutting-edge memory solutions for cloud and data center applications.

Skills

UVM SystemVerilog C++ ASIC verification Verification flows Tools CI/CD Project management Risk mitigation Team leadership Silicon bring up Debugging

What you'll do

  • Define and implement SoC verification strategy and methodology.
  • Lead team to successful verification signoffs for multiple concurrent projects.
  • Plan and manage resources across various SoC development milestones.
  • Work with Architecture, Design, FW, Validation teams on verification requirements.
  • Provide support in post-silicon bring-up and debugging processes.

What we're looking for

  • 15+ years of experience in ASIC verification, preferably with a BE or MS degree.
  • Proven leadership in managing verification teams for multiple successful tape-outs.
  • Expertise in UVM, C++, and SystemVerilog for verification flows and tools.
  • Strong project management skills for complex schedules and resource allocation.
  • Excellent communication and collaboration abilities across engineering disciplines.
  • Self-motivated problem-solving with a focus on first-pass silicon success.

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