Defect Reduction Engineer

Samsung Electronics

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Austin, TX
Salary
$76,000–$145,000 / yr
Posted
31 days ago
Freshness
Confirmed live yesterday
Closes
Aug 11, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $180k
This role $110k
$59k most similar roles pay here $237k

This role pays less than 94% of similar roles. Most pay $146,500–$214,500 — the shaded band above. At the midpoint, this role pays about $110k versus about $180k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Electronics

Samsung Electronics is a South Korean multinational corporation and a global leader in technology, specializing in consumer electronics, semiconductors, and home appliances.

Samsung Electronics currently has 94 open roles on FindRole.

Listed pay typically runs $106,000–$174,500 across 58 roles with salary data.

Most-posted roles

View all roles at Samsung Electronics

At a glance

TL;DR · Defect Reduction Engineer

As a Defect Reduction Engineer, you will support defect control and reduction within a high-volume manufacturing environment to achieve specific yield and performance goals. You will serve as the defect reduction representative for New Product Introduction, where you will present inspection strategies, perform spec audits, and evaluate tool spreads regarding inline and NPW defectivity data. Your daily responsibilities include performing trend data correlation analysis to identify dog tools, tracing defects to root causes, and managing monitoring plans for both new technology ramps and legacy production nodes. You will utilize advanced inspection tools such as bright field, dark field, e-beam, and Vis-edge, while applying Klarity Defect software, SPC, and DOE methodologies. This role addresses critical semiconductor manufacturing challenges by ensuring process stability and meeting foundry customer requirements through cross-functional collaboration and data mining.

What you'll do

  • Support New Product Introduction by presenting inspection strategies and evaluating tool spreads for defectivity data.
  • Analyze fab process and tool trend data to identify faulty tools and trace defects to their root causes.
  • Take rapid corrective actions to prevent inline process excursions and maintain production stability.
  • Collaborate with cross-functional teams to evaluate defect data, monitor excursions, and reduce SWLY.
  • Establish Failed Chip Count (FCC) and trend monitoring plans for new and legacy production nodes.
  • Respond to foundry customer requests by providing detailed data and analysis to meet expectations.
  • Support the transfer of new technologies and processes from Samsung headquarters in South Korea.

What we're looking for

  • Bachelor's degree in Electrical, Chemical, Mechanical Engineering, Material Science, Chemistry, Physics, or a related technical field.
  • Minimum of 10 years of semiconductor process engineering experience in defect monitor and reduction.
  • Experience in leading logic technology development for 45nm or below is strongly preferred.
  • Experience with advanced defect inspection and review tools such as bright field, dark field, e-beam, and Vis-edge is strongly preferred.
  • Working knowledge of SPC and DOE methodology is required.
  • Excellent written, verbal, and presentation communication skills are required.
  • Strong data mining, troubleshooting skills, and organizational skills to manage multiple tasks are preferred.
  • Must be authorized to access information subject to U.S. export control laws.

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