Debug SoC Design Engineer

Apple Inc

Quick summary

Work type: On-site
Location: Irvine, CA
Salary: $120,300–$210,100 / yr
Posted: 52 days ago
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $189k

This role $165k

$108k most similar roles pay here $233k

This role pays less than 72% of similar roles. Most pay $161,350–$216,250 — the shaded band above. At the midpoint, this role pays about $165k versus about $189k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1723 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1398 roles with salary data.

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At a glance

TL;DR · Debug SoC Design Engineer

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As a Debug SoC Design Engineer, you will join a dynamic hardware team at the forefront of semiconductor innovation, taking on a senior role that demands expertise in defining and implementing robust debug features for complex systems-on-chip. Your daily responsibilities include owning the RTL design of the debug and trace hub, collaborating with architects and IP developers to ensure subsystems meet stringent power, performance, and area goals. You will also guide validation engineers in diagnosing issues using advanced debugging techniques and work closely with verification teams to develop test benches for functional verification. Familiarity with industry-standard EDA tools and microprocessor debug methodologies like CoreSight is essential, as you tackle the challenges of delivering high-quality ASICs that delight millions of customers.

Skills

VLSI RTL Verilog SystemVerilog UVM CoreSight EDA Simulation Emulation Performance Analysis Power Analysis CI/CD Git Linux Python Perl Tcl Microprocessor Debug Debug Hub Design Trace Hub Design

What you'll do

Define and refine RTL design for the debug and trace hub to meet power, performance, and area goals.
Develop detailed specifications for architectural debug features in collaboration with cross-functional teams.
Support verification team by developing test benches and simulations for functional verification of debug features.
Assist performance/power teams in diagnosing suspected bottlenecks or overconsumption issues.
Aid validation engineers in using debug features to diagnose silicon-level issues at the SoC level.

What we're looking for

Bachelor’s degree in a relevant field required
Experience in RTL development for power, performance, area optimization
Micro-architecture development and specification expertise
Verification support including test bench development and simulation
Knowledge of microprocessor debug techniques like CoreSight
Familiarity with design methodologies and industry-standard EDA tools

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